An Approach to Evaluating the Effects of Realistic Faults in Digital Circuits.
Zbigniew Kalbarczyk, Janak H. Patel, Myeong S. Lee, Ravishankar K. Iyer
Browse the full VLSID paper archive.
Zbigniew Kalbarczyk, Janak H. Patel, Myeong S. Lee, Ravishankar K. Iyer
Browse the full VLSID paper archive.