| 2005 | ICCD | Hardware Ef.cient LBISTWith Complementary Weights. | Liyang Lai, Janak H. Patel, Thomas Rinderknecht, Wu-Tung Cheng |
| 2004 | ITC | Logic BIST with Scan Chain Segmentation. | Liyang Lai, Janak H. Patel, Thomas Rinderknecht, Wu-Tung Cheng |
| 2004 | VTS | Logic BIST Using Constrained Scan Cells. | Liyang Lai, Thomas Rinderknecht, Wu-Tung Cheng, Janak H. Patel |
| 2004 | VTS | What Does Robust Testing a Subset of Paths, Tell us about the Untested Paths in the Circuit? | Manish Sharma, Janak H. Patel |
| 2003 | VTS | Application of Saluja-Karpovsky Compactors to Test Responses with Many Unknowns. | Janak H. Patel, Steven S. Lumetta, Sudhakar M. Reddy |
| 2003 | VTS | Test Data Compression and Test Time Reduction of Longest-Path-Per-Gate Tests based on Illinois Scan Architecture. | Manish Sharma, Janak H. Patel, Jeff Rearick |
| 2002 | DATE | An Incremental Algorithm for Test Generation in Illinois Scan Architecture Based Designs. | Amit R. Pandey, Janak H. Patel |
| 2002 | ITC | Finding a Small Set of Longest Testable Paths that Cover Every Gate. | Manish Sharma, Janak H. Patel |
| 2002 | VTS | Reconfiguration Technique for Reducing Test Time and Test Data Volume in Illinois Scan Architecture Based Designs . | Amit R. Pandey, Janak H. Patel |
| 2001 | ITC | A case study on the implementation of the Illinois Scan Architecture. | Frank F. Hsu, Kenneth M. Butler, Janak H. Patel |
| 2001 | ITC | Testing of critical paths for delay faults. | Manish Sharma, Janak H. Patel |
| 2001 | VLSID | A Graph Traversal Based Framework For Sequential Logic Implication With An Application To C-Cycle Redundancy Identification. | Jian-Kun Zhao, Jeffrey A. Newquist, Janak H. Patel |
| 2000 | ICCAD | Deterministic Test Pattern Generation Techniques for Sequential Circuits. | Ilker Hamzaoglu, Janak H. Patel |
| 2000 | ITC | Enhanced delay defect coverage with path-segments. | Manish Sharma, Janak H. Patel |
| 2000 | VTS | Reducing Test Application Time for Built-in-Self-Test Test Pattern Generators. | Ilker Hamzaoglu, Janak H. Patel |
| 2000 | VTS | Bounding Circuit Delay by Testing a Very Small Subset of Paths. | Manish Sharma, Janak H. Patel |
| 1999 | VLSID | A Test Generator for Segment Delay Faults. | Keerthi Heragu, Janak H. Patel, Vishwani D. Agrawal |
| 1999 | VLSID | An Approach to Evaluating the Effects of Realistic Faults in Digital Circuits. | Zbigniew Kalbarczyk, Janak H. Patel, Myeong S. Lee, Ravishankar K. Iyer |
| 1998 | ICCAD | Test set compaction algorithms for combinational circuits. | Ilker Hamzaoglu, Janak H. Patel |
| 1998 | ICCAD | High-level variable selection for partial-scan implementation. | Frank F. Hsu, Janak H. Patel |
| 1998 | ICCD | Enhancing topological ATPG with high-level information and symbolic techniques. | Fulvio Corno, Janak H. Patel, Elizabeth M. Rudnick, Matteo Sonza Reorda, Roberto Vietti |
| 1998 | ISCA | A Low-Overhead Coherence Solution for Multiprocessors with Private Cache Memories. | Mark S. Papamarcos, Janak H. Patel |
| 1998 | ISCA | Retrospective: Improving the Throughput of a Pipeline by Insertion of Delays. | Janak H. Patel |
| 1998 | ISCA | Retrospective: A Low-Overhead Coherence Solution for Multiprocessors with Private Cache Memories. | Janak H. Patel |
| 1998 | ISCA | Improving the Throughput of a Pipeline by Insertion of Delays. | Janak H. Patel, Edward S. Davidson |
| 1998 | ITC | Stuck-at fault: a fault model for the next millennium. | Janak H. Patel |
| 1998 | ITC | Compact two-pattern test set generation for combinational and full scan circuits. | Ilker Hamzaoglu, Janak H. Patel |
| 1998 | VLSID | Partial Scan Selection Based on Dynamic Reachability and Observability Information. | Michael S. Hsiao, Gurjeet S. Saund, Elizabeth M. Rudnick, Janak H. Patel |
| 1998 | VLSID | Diagnostic Simulation of Sequential Circuits Using Fault Sampling. | Srikanth Venkataraman, W. Kent Fuchs, Janak H. Patel |
| 1998 | VTS | New Techniques for Deterministic Test Pattern Generation. | Ilker Hamzaoglu, Janak H. Patel |
| 1997 | DATE | Sequential circuit test generation using dynamic state traversal. | Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel |
| 1997 | ICCAD | Fast identification of untestable delay faults using implications. | Keerthi Heragu, Janak H. Patel, Vishwani D. Agrawal |
| 1997 | ICCAD | Effects of delay models on peak power estimation of VLSI sequential circuits. | Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel |
| 1997 | ISLPED | K2: an estimator for peak sustainable power of VLSI circuits. | Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel |
| 1997 | ITC | BART: A Bridging Fault Test Generation for Sequential Circuits. | James P. Cusey, Janak H. Patel |
| 1997 | ITC | Putting the Squeeze on Test Sequences. | Elizabeth M. Rudnick, Janak H. Patel |
| 1997 | PADS | Asynchronous Parallel Algorithms for Test Set Partitioned Fault Simulation. | Dilip Krishnaswamy, Prithviraj Banerjee, Elizabeth M. Rudnick, Janak H. Patel |
| 1997 | VLSID | Dynamic Fault Grouping for PROOFS: A Win for Large Sequential Circuits. | Charles R. Graham, Elizabeth M. Rudnick, Janak H. Patel |
| 1997 | VLSID | Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation. | Dilip Krishnaswamy, Michael S. Hsiao, Vikram Saxena, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee |
| 1997 | VLSID | Overcoming the Serial Logic Simulation Bottleneck in Parallel Fault Simulation. | Elizabeth M. Rudnick, Janak H. Patel |
| 1997 | VTS | Diagnostic Test Pattern Generation for Sequential Circuits. | Ismed Hartanto, Vamsi Boppana, Janak H. Patel, W. Kent Fuchs |
| 1997 | VTS | Fast Algorithms for Static Compaction of Sequential Circuit Test Vectors. | Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel |
| 1997 | VTS | SPITFIRE: scalable parallel algorithms for test set partitioned fault simulation. | Dilip Krishnaswamy, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee |
| 1997 | VTS | Static logic implication with application to redundancy identification. | Jian-Kun Zhao, Elizabeth M. Rudnick, Janak H. Patel |
| 1996 | DAC | Partial Scan Design Based on Circuit State Information. | Dong Xiang, Srikanth Venkataraman, W. Kent Fuchs, Janak H. Patel |
| 1996 | DATE | Alternating Strategies for Sequential Circuit ATPG. | Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel |
| 1996 | ICCAD | SIGMA: a simulator for segment delay faults. | Keerthi Heragu, Janak H. Patel, Vishwani D. Agrawal |
| 1996 | ICCAD | Enhancing high-level control-flow for improved testability. | Frank F. Hsu, Elizabeth M. Rudnick, Janak H. Patel |
| 1996 | ICCAD | Simulation-based techniques for dynamic test sequence compaction. | Elizabeth M. Rudnick, Janak H. Patel |
| 1996 | ITC | On Potential Fault Detection in Sequential Circuits. | Elizabeth M. Rudnick, Janak H. Patel, Irith Pomeranz |
| 1996 | ITC | A Global Algorithm for the Partial Scan Design Problem Using Circuit State Information. | Dong Xiang, Janak H. Patel |
| 1996 | VLSID | Improving accuracy in path delay fault coverage estimation. | Keerthi Heragu, Janak H. Patel, Vishwani D. Agrawal |
| 1996 | VTS | Segment delay faults: a new fault model. | Keerthi Heragu, Janak H. Patel, Vishwani D. Agrawal |
| 1996 | VTS | Automatic test generation using genetically-engineered distinguishing sequences. | Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel |
| 1996 | VTS | Genetic-algorithm-based test generation for current testing of bridging faults in CMOS VLSI circuits. | Terry Lee, Ibrahim N. Hajj, Elizabeth M. Rudnick, Janak H. Patel |
| 1995 | DAC | Combining Deterministic and Genetic Approaches for Sequential Circuit Test Generation. | Elizabeth M. Rudnick, Janak H. Patel |
| 1995 | DAC | Rapid Diagnostic Fault Simulation of Stuck-at Faults in Sequential Circuits Using Compact Lists. | Srikanth Venkataraman, Ismed Hartanto, W. Kent Fuchs, Elizabeth M. Rudnick, Sreejit Chakravarty, Janak H. Patel |
| 1995 | ICCD | A new architectural-level fault simulation using propagation prediction of grouped fault-effects. | Michael S. Hsiao, Janak H. Patel |
| 1995 | ICCD | A parallel algorithm for fault simulation based on PROOFS . | Steven Parkes, Prithviraj Banerjee, Janak H. Patel |
| 1995 | VLSID | A genetic approach to test application time reduction for full scan and partial scan circuits. | Elizabeth M. Rudnick, Janak H. Patel |
| 1995 | VTS | Cyclic stress tests for full scan circuits. | Vinay Dabholkar, Sreejit Chakravarty, J. Najm, Janak H. Patel |
| 1995 | VTS | A distance reduction approach to design for testability. | Frank F. Hsu, Janak H. Patel |
| 1994 | DAC | Microprocessor Testing: Which Technique is Best? (Panel). | Jacob A. Abraham, Sandip Kundu, Janak H. Patel, Manuel A. d'Abreu, Bulent I. Dervisoglu, Marc E. Levitt, Hector R. Sucar, Ron G. Walther |
| 1994 | DAC | ProperHITEC: A Portable, Parallel, Object-Oriented Approach to Sequential Test Generation. | Steven Parkes, Prithviraj Banerjee, Janak H. Patel |
| 1994 | DAC | Sequential Circuit Test Generation in a Genetic Algorithm Framework. | Elizabeth M. Rudnick, Janak H. Patel, Gary S. Greenstein, Thomas M. Niermann |
| 1994 | ICCAD | Fast timing simulation of transient faults in digital circuits. | Abhijit Dharchoudhury, Sung-Mo Kang, Hungse Cha, Janak H. Patel |
| 1994 | ICCD | Latch Design for Transient Pulse Tolerance. | Hungse Cha, Janak H. Patel |
| 1993 | DAC | Non-Scan Design-for-Testability Techniques for Sequential Circuits. | Vivek Chickermane, Elizabeth M. Rudnick, Prithviraj Banerjee, Janak H. Patel |
| 1993 | ICCD | A Logic-Level Model for alpha-Paricle Hits in CMOS Circuits. | Hungse Cha, Janak H. Patel |
| 1993 | ICPP | Memory Reference Behavior of Compiler Optimized Programs on High Speed. | John W. C. Fu, Janak H. Patel |
| 1993 | ISCAS | Efficient Variable Ordering Heuristics for Shared ROBDD. | Pi-Yu Chung, Ibrahim N. Hajj, Janak H. Patel |
| 1993 | ITC | Fast and Accurate CMOS Bridging Fault Simulation. | Jeff Rearick, Janak H. Patel |
| 1993 | VTS | Impact of high level functional constraints on testability. | Jaushin Lee, Vivek Chickermane, Janak H. Patel |
| 1993 | VTS | Testability analysis based on structural and behavioral information. | Jaushin Lee, Janak H. Patel |
| 1992 | DAC | APT: An Area-Performance-Testability Driven Placement Algorithm. | Sungho Kim, Prithviraj Banerjee, Vivek Chickermane, Janak H. Patel |
| 1992 | DAC | Hierarchical Test Generation under Intensive Global Functional Constraints. | Jaushin Lee, Janak H. Patel |
| 1992 | ICCAD | A comparative study of design for testability methods using high-level and gate-level descriptions. | Vivek Chickermane, Jaushin Lee, Janak H. Patel |
| 1992 | ICCAD | E-PROOFS: a CMOS bridging fault simulator. | Gary S. Greenstein, Janak H. Patel |
| 1992 | ICCAD | Automatic test generation for linear digital systems with bi-level search using matrix transform methods. | Rabindra K. Roy, Abhijit Chatterjee, Janak H. Patel, Jacob A. Abraham, Manuel A. d'Abreu |
| 1992 | ICPP | Compile Time Parallel Resource Allocation for Unbounded Tree Structure Task Graphs. | Jeff Baxter, Balkrishna Ramkumar, Janak H. Patel |
| 1992 | ITC | Design for Testability Using Architectural Descriptions. | Vivek Chickermane, Jaushin Lee, Janak H. Patel |
| 1992 | ITC | An Instruction Sequence Assembling Methodology for Testing Microprocessors. | Jaushin Lee, Janak H. Patel |
| 1992 | ITC | Diagnostic Fault Simulation of Sequential Circuits. | Elizabeth M. Rudnick, W. Kent Fuchs, Janak H. Patel |
| 1992 | MICRO | Stride directed prefetching in scalar processors. | John W. C. Fu, Janak H. Patel, Bob L. Janssens |
| 1992 | VTS | Probe point insertion for at-speed test. | Elizabeth M. Rudnick, Vivek Chickermane, Janak H. Patel |
| 1991 | DAC | Parallel Test Generation for Sequential Circuits on General-Purpose Multiprocessors. | Srinivas Patil, Prithviraj Banerjee, Janak H. Patel |
| 1991 | ICCAD | A Fault Oriented Partial Scan Design Approach. | Vivek Chickermane, Janak H. Patel |
| 1991 | ICCAD | A Signal-Driven Discrete Relaxation Technique for Architectural Level Test Generation. | Jaushin Lee, Janak H. Patel |
| 1991 | ICCAD | Methods for Reducing Events in Sequential Circuit Fault Simulation. | Elizabeth M. Rudnick, Thomas M. Niermann, Janak H. Patel |
| 1991 | ISCA | Data Prefetching in Multiprocessor Vector Cache Memories. | John W. C. Fu, Janak H. Patel |
| 1991 | ITC | ARTEST: An Architectural Level Test Generator for Data Path Faults and Control Faults. | Jaushin Lee, Janak H. Patel |
| 1990 | DAC | Proofs: A Fast, Memory Efficient Sequential Circuit Fault Simulator. | Thomas M. Niermann, Wu-Tung Cheng, Janak H. Patel |
| 1990 | ICPP | Performance Evaluation of Clusters of NETRA: An Architecture for Computer Vision Systems. | Alok N. Choudhary, Janak H. Patel |
| 1990 | ICPR | A reconfigurable and hierarchical parallel processing architecture: performance results for stereo vision. | Alok N. Choudhary, Subhodev Das, Narendra Ahuja, Janak H. Patel |
| 1990 | ICPR | Parallel implementation and evaluation of motion estimation system algorithms on a distributed memory multiprocessor using knowledge based mappings. | Alok N. Choudhary, Mun K. Leung, Thomas S. Huang, Janak H. Patel |
| 1990 | ITC | An optimization based approach to the partial scan design problem. | Vivek Chickermane, Janak H. Patel |
| 1989 | DAC | A Functional-Level Test Generation Methodology Using Two-level Representations. | Utpal J. Dav, Janak H. Patel |
| 1989 | ICCAD | Accurate logic simulation in the presence of unknowns. | Susheel J. Chandra, Janak H. Patel |
| 1989 | ICPP | The LAST Algorithm: A Heuristic-Based Static Task Allocation Algorithm. | Jeff Baxter, Janak H. Patel |
| 1989 | ICPP | Cache-Based Error Recovery for Shared Memory Multiprocessor Systems. | Kun-Lung Wu, W. Kent Fuchs, Janak H. Patel |
| 1989 | SC | Load balancing and task decomposition techniques for parallel implementation of integrated vision systems algorithms. | Alok N. Choudhary, Janak H. Patel |
| 1988 | ICCAD | Diagnosis and repair of memory with coupling faults. | Ming-Feng Chang, W. Kent Fuchs, Janak H. Patel |
| 1988 | ICCAD | Compaction of ATPG-generated test sequences for sequential circuits. | Rabindra K. Roy, Thomas M. Niermann, Janak H. Patel, Jacob A. Abraham, Resve A. Saleh |
| 1988 | ICCD | Test generation in a parallel processing environment. | Susheel J. Chandra, Janak H. Patel |
| 1988 | ICPP | A Parallel Processing Architecture for an Integrated Vision System. | Alok N. Choudhary, Janak H. Patel |
| 1988 | ISCA | Performance Evaluation of On-Chip Register and Cache Organizations. | Richard J. Eickemeyer, Janak H. Patel |
| 1987 | DAC | A Hierarchical Approach Test Vector Generation. | Susheel J. Chandra, Janak H. Patel |
| 1987 | DAC | Design and Algorithms for Parallel Testing of Random Access and Content Addressable Memories. | Pinaki Mazumder, Janak H. Patel, W. Kent Fuchs |
| 1987 | ICPP | Parallel Garbage Collection on a Virtual Memory System. | Santosh G. Abraham, Janak H. Patel |
| 1987 | ISCA | Performance Evaluation of Multiple Register Sets. | Richard J. Eickemeyer, Janak H. Patel |
| 1986 | DAC | Effectiveness of heuristics measures for automatic test pattern generation. | Sanjay J. Patel, Janak H. Patel |
| 1986 | ISCA | Performance Measurement of Paging Behavior in Multiprogramming Systems. | Mohammad Malkawi, Janak H. Patel |
| 1985 | ISCA | Parallel Garbage Collection Without Synchronization Overhead. | Ashwin Ram, Janak H. Patel |
| 1985 | ISCA | An Efficient LISP-Execution Architecture with a New Representation for List Structures. | Gurindar S. Sohi, Edward S. Davidson, Janak H. Patel |
| 1985 | ITC | Multiple-Fault Detection in Iterative Logic Arrays. | Wu-Tung Cheng, Janak H. Patel |
| 1985 | SOSP | Compiler Directed Memory Management Policy For Numerical Programs. | Mohammad Malkawi, Janak H. Patel |
| 1984 | ISCA | A Low-Overhead Coherence Solution for Multiprocessors with Private Cache Memories. | Mark S. Papamarcos, Janak H. Patel |
| 1984 | ITC | Design of Test Pattern Generators for Built-In Test. | Ramaswami Dandapani, Janak H. Patel, Jacob A. Abraham |
| 1983 | ISCA | Performance of Shared Cache for Parallel-Pipelined Computer Systems | Phil C. C. Yeh, Janak H. Patel, Edward S. Davidson |
| 1982 | ICPP | A performance model for instruction prefetch in pipelined instruction units. | Gregory F. Grohoski, Janak H. Patel |
| 1979 | ISCA | Processor-Memory Interconnections for Multiprocessors. | Janak H. Patel |
| 1978 | ISCA | Pipelines wth Internal Buffers. | Janak H. Patel |
| 1976 | ISCA | Improving the Throughput of a Pipeline by Insertion of Delays. | Janak H. Patel, Edward S. Davidson |