A 0.5V VMIN 6T SRAM in 28nm UTBB FDSOI Technology Using Compensated WLUD Scheme with Zero Performance Loss.
Ashish Kumar, G. S. Visweswaran, Vinay Kumar, Kaushik Saha
Browse the full VLSID paper archive.
Ashish Kumar, G. S. Visweswaran, Vinay Kumar, Kaushik Saha
Browse the full VLSID paper archive.