| 2018 | VLSID | A 0.6V Retention VMIN Ultra-Low Leakage High Density 6T SRAM in 40nm CMOS Technology Using Adaptive Source Bias. | Ashish Kumar, G. S. Visweswaran |
| 2016 | VLSID | A 0.5V VMIN 6T SRAM in 28nm UTBB FDSOI Technology Using Compensated WLUD Scheme with Zero Performance Loss. | Ashish Kumar, G. S. Visweswaran, Vinay Kumar, Kaushik Saha |
| 2016 | VTS | Impact of crosstalk and process variation on capture power reduction for at-speed test. | Surya Piplani, G. S. Visweswaran, Anshul Kumar |
| 2008 | ICCAD | Texture filter memory: a power-efficient and scalable texture memory architecture for mobile graphics processors. | B. V. N. Silpa, Anjul Patney, Tushar Krishna, Preeti Ranjan Panda, G. S. Visweswaran |
| 2005 | VLSID | A Relative Comparative Based Datapath for Increasing Resolution in a Capacitive Fingerprint Sensor Chip. | Mukul Milind Ojha, Arun Kumar Anand, G. S. Visweswaran, D. Nagchoudhuri |
| 2004 | VLSID | Inclusion of Thermal Effects in the Simulation of Bipolar Circuits using Circuit Level Behavioral Modeling. | Tushar S. Shelar, G. S. Visweswaran |
| 2000 | VLSID | Jitter Estimation Methodology for Clock Chips. | Sanjeev Kumar Maheshwari, R. S. Krishanan, G. S. Visweswaran |
| 2000 | VLSID | A 3.3V Compatible 2.5V TTL-to-CMOS Bidirectional I/O Buffer. | Sanjeev Kumar Maheshwari, G. S. Visweswaran |
| 1999 | VLSID | A Low Power 256 KB SRAM Design. | Basabi Bhaumik, Pravas Pradhan, G. S. Visweswaran, Rajamohan Varambally, Anand Hardi |
| 1999 | VLSID | A New Test Compression Scheme. | Basabi Bhaumik, G. S. Visweswaran, R. Lakshminarasimhan |
| 1998 | VLSID | Current Mode Ternary D/A Converter. | Saeid Nooshabadi, G. S. Visweswaran, D. Nagchoudhuri |
| 1997 | VLSID | Micropipeline Architecture for Multiplier-less FIR Filters. | Saeid Nooshabadi, Juan A. Montiel-Nelson, G. S. Visweswaran, D. Nagchoudhuri |