Skip to content
cs-conference-ranking
.org
By subfield
By rank
Methodology
⌕
Search 971 venues
Home
/
VLSID
/
Paper
Modeling Techniques for Formal Verification of BIST Controllers and Their Integration into SOC Designs.
Subir K. Roy
,
Rubin A. Parekhji
Venue
National
VLSID
Year
2007
Proceedings
VLSI Design
DBLP record
conf/vlsid/RoyP07 ↗
Browse the full
VLSID paper archive
.