A Partially Loop-Unrolled Noise-Shaping SAR ADC Achieving 57dB-SNDR in 40MHz-BW at 320MS/s in 18nm FD-SOI CMOS Technology.
Anamika Sharma, Luv Pandey, Paras Garg, Rajesh Zele
Browse the full VLSID paper archive.
Anamika Sharma, Luv Pandey, Paras Garg, Rajesh Zele
Browse the full VLSID paper archive.