A 100MHz to 1GHz, 0.35V to 1.5V Supply 256 x 64 SRAM Block Using Symmetrized 9T SRAM Cell with Controlled Read.
Satish Anand Verkila, Siva Kumar Bondada, Bharadwaj S. Amrutur
Browse the full VLSID paper archive.
Satish Anand Verkila, Siva Kumar Bondada, Bharadwaj S. Amrutur
Browse the full VLSID paper archive.