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Paper
A New Partially-Parallel VLSI-Architecture of Quasi-Cyclic LDPC Decoder for 5G New-Radio.
Anuj Verma
,
Rahul Shrestha
Venue
National
VLSID
Year
2020
Proceedings
VLSID
DBLP record
conf/vlsid/VermaS20 ↗
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