An Efficient Design Approach for Implementation of 2 Bit Ternary Flash ADC Using Optimized Complementary TFET Devices.
Sanjay Vidhyadharan, Ramakant Ramakant, Abhay S. Vidhyadharan, A. Krishna Shyam, Mohit P. Hirpara, Surya Shankar Dan
Browse the full VLSID paper archive.