Skip to content
cs-conference-ranking
.org
By subfield
By rank
Methodology
⌕
Search 971 venues
Home
/
VLSID
/
Paper
Delay Test Scan Flip-Flop: DFT for High Coverage Delay Testing.
Gefu Xu
,
Adit D. Singh
Venue
National
VLSID
Year
2007
Proceedings
VLSI Design
DBLP record
conf/vlsid/XuS07 ↗
Browse the full
VLSID paper archive
.