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Ahmed Hemani

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

65

Venues

17

Active years

1993–2026

Best venue rank

A*

Where they publish

Papers

65 indexed papers, newest first.

YearVenueTitleAuthors
2026DATELate Breaking Results: Quamba-SE: Soft-edge Quantizer for Activations in State Space Models.Yizhi Chen, Ahmed Hemani
2025DSDModeling and Scheduling of Composable Instruction Set.Yu Yang, Paul Delestrac, Ahmed Hemani
2024ASPDACFPGA-Based HPC for Associative Memory System.Deyu Wang, Yuning Wang, Yu Yang, Dimitrios Stathis, Ahmed Hemani, Anders Lansner, Jiawei Xu, Li-Rong Zheng, Zhuo Zou
2024DSDExploration of Custom Floating-Point Formats: A Systematic Approach.Saba Yousefzadeh, Yu Yang, Astile Peter, Dimitrios Stathis, Ahmed Hemani
2023DSDImplementation of Sobel Edge Detection on DRRA and DiMArch Architectures.Pudi Dhilleswararao, Rajeev Ryansh, Vamsi Goudu, Srinivas Boppu, Ahmed Hemani
2023VLSIDDRRA-based Reconfigurable Architecture for Mixed-Radix FFT.Reeshita Kallapu, Dimitrios Stathis, Srinivas Boppu, Ahmed Hemani
2022DATEReducing the Configuration Overhead of the Distributed Two-level Control System.Yu Yang, Dimitrios Stathis, Ahmed Hemani
2021DATEApproximate computation of post-synaptic spikes reduces bandwidth to synaptic storage in a model of cortex.Dimitrios Stathis, Yu Yang, Ahmed Hemani, Anders Lansner
2021DSDScheduling Persistent and Fully Cooperative Instructions.Yu Yang, Ahmed Hemani, Kolin Paul
2021FCCMScheduling Persistent and Fully Cooperative Instructions.Yu Yang, Ahmed Hemani, Kolin Paul
2020DACNACU: A Non-Linear Arithmetic Unit for Neural Networks.Guido Baccelli, Dimitrios Stathis, Ahmed Hemani, Maurizio Martina
2017DSDSPEED: Open-Source Framework to Accelerate Speech Recognition on Embedded GPUs.Syed Mohammad Asad Hassan Jafri, Ahmed Hemani, Leonardo Intesa
2016DSDElastic Management and QoS Provisioning Scheme for Adaptable Multi-core Protocol Processing Architecture.Mohammad Badawi, Zhonghai Lu, Ahmed Hemani
2016ISCAThe SiLago Method: Next Generation VLSI Architectures and Design Methods.Ahmed Hemani
2016PDPService-Guaranteed Multi-port Packet Memory for Parallel Protocol Processing Architecture.Mohammad Badawi, Zhonghai Lu, Ahmed Hemani
2015PDPFIST: A Framework to Interleave Spiking Neural Networks on CGRAs.Tuan Ngyen, Syed M. A. H. Jafri, Masoud Daneshtalab, Ahmed Hemani, Sergei Dytckov, Juha Plosila, Hannu Tenhunen
2015VLSIDDyMeP: An Infrastructure to Support Dynamic Memory Binding for Runtime Mapping in CGRAs.Muhammad Adeel Tajammul, Syed M. A. H. Jafri, Peeter Ellervee, Ahmed Hemani, Hannu Tenhunen, Juha Plosila
2014ASPDACA scalable custom simulation machine for the Bayesian Confidence Propagation Neural Network model of the brain.Nasim Farahini, Ahmed Hemani, Anders Lansner, Fabien Clermidy, Christer Svensson
2014ASPDACSpiking brain models: Computation, memory and communication constraints for custom hardware implementation.Anders Lansner, Ahmed Hemani, Nasim Farahini
2014CPCase Study: Constraint Programming in a System Level Synthesis Framework.Shuo Li, Ahmed Hemani
2014DSDMorphable Compression Architecture for Efficient Configuration in CGRAs.Syed Mohammad Asad Hassan Jafri, Muhammad Adeel Tajammul, Masoud Daneshtalab, Ahmed Hemani, Kolin Paul, Peeter Ellervee, Juha Plosila, Hannu Tenhunen
2014DSDThree-Dimensional Design Space Exploration for System Level Synthesis.Shuo Li, Ahmed Hemani
2014FCCMCustomizable Compression Architecture for Efficient Configuration in CGRAs.Syed M. A. H. Jafri, Muhammad Adeel Tajammul, Masoud Daneshtalab, Ahmed Hemani, Kolin Paul, Peeter Ellervee, Juha Plosila, Hannu Tenhunen
2014FCCMAccurate and Efficient Three Level Design Space Exploration Based on Constraints Satisfaction Optimization Problem Solver.Shuo Li, Ahmed Hemani
2014FPLTransPar: Transformation based dynamic Parallelism for low power CGRAs.Syed M. A. H. Jafri, Guilermo Serrano, Masoud Daneshtalab, Naeem Abbas, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
2014ISCAExploring Spiking Neural Network on Coarse-Grain Reconfigurable Architectures.Hassan Anwar, Syed M. A. H. Jafri, Sergei Dytckov, Masoud Daneshtalab, Masoumeh Ebrahimi, Ahmed Hemani, Juha Plosila, Giovanni Beltrame, Hannu Tenhunen
2013DSDDistributed Runtime Computation of Constraints for Multiple Inner Loops.Nasim Farahini, Ahmed Hemani, Kolin Paul
2013DSDEnergy-Aware Fault-Tolerant CGRAs Addressing Application with Different Reliability Needs.Syed M. A. H. Jafri, Stanislaw J. Piestrak, Kolin Paul, Ahmed Hemani, Juha Plosila, Hannu Tenhunen
2013DSDGlobal Interconnect and Control Synthesis in System Level Architectural Synthesis Framework.Shuo Li, Ahmed Hemani
2013FCCMGlobal Control and Storage Synthesis for a System Level Synthesis Approach.Shuo Li, Nasim Farahini, Ahmed Hemani
2013ISCAA code generation method for system-level synthesis on ASIC, FPGA and manycore CGRA.Shuo Li, Jamshaid Sarwar Malik, Shaoteng Liu, Ahmed Hemani
2013ISCAS39.9 GOPs/watt multi-mode CGRA accelerator for a multi-standard basestation.Nasim Farahini, Shuo Li, Muhammad Adeel Tajammul, Muhammad Ali Shami, Guo Chen, Ahmed Hemani, Wei Ye
2013ISCASHigh performance 3D-FFT implementation.U. Nidhi, Kolin Paul, Ahmed Hemani, Anshul Kumar
2012DSDEnergy-Aware Fault-Tolerant Network-on-Chips for Addressing Multiple Traffic Classes.Syed M. A. H. Jafri, Liang Guang, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
2012VLSIDLow-Latency No-Handshake GALS Interfaces for Fast-Receiver Links.Jean-Michel Chabloz, Ahmed Hemani
2011DATEPredicting bus contention effects on energy and performance in multi-processor SoCs.Sandro Penolazzi, Ingo Sander, Ahmed Hemani
2011DSDLow-Latency and Low-Overhead Mesochronous and Plesiochronous Synchronizers.Jean-Michel Chabloz, Ahmed Hemani
2011DSDOptimal Selection of Function Implementation in a Hierarchical Configware Synthesis Method for a Coarse Grain Reconfigurable Architecture.Fahimeh Jafari, Shuo Li, Ahmed Hemani
2011ICCDA GALS Network-on-Chip based on rationally-related frequencies.Jean-Michel Chabloz, Ahmed Hemani
2011VLSIDA Reconfigurable Processor for Phylogenetic Inference.Pei Liu, Ahmed Hemani, Kolin Paul
2011VLSIDA Library Development Framework for a Coarse Grain Reconfigurable Architecture.Omer Malik, Ahmed Hemani, Muhammad Ali Shami
2011VLSIDNoC Based Distributed Partitionable Memory System for a Coarse Grain Reconfigurable Architecture.Muhammad Adeel Tajammul, Muhammad Ali Shami, Ahmed Hemani, Sridharan Moorthi
2010DATEPredicting energy and performance overhead of Real-Time Operating Systems.Sandro Penolazzi, Ingo Sander, Ahmed Hemani
2010ICCDLowering the latency of interfaces for rationally-related frequencies.Jean-Michel Chabloz, Ahmed Hemani
2010ISLPEDDistributed DVFS using rationally-related frequencies and discrete voltage levels.Jean-Michel Chabloz, Ahmed Hemani
2010SBAC-PADControl Scheme for a CGRA.Muhammad Ali Shami, Ahmed Hemani
2009DSDEnergy and Performance Model of a SPARC Leon3 Processor.Sandro Penolazzi, Luca Bolognino, Ahmed Hemani
2009ICCDA flexible communication scheme for rationally-related clock frequencies.Jean-Michel Chabloz, Ahmed Hemani
2009VLSIDA General Approach to High-Level Energy and Performance Estimation in SoCs.Sandro Penolazzi, Ahmed Hemani, Luca Bolognino
2009SINAdaptability infrastructure for bridging IT security evaluation and options theory.Haider Abbas, Louise Yngstrm, Ahmed Hemani
2001DSDTest Strategies on Functionally Partitioned Module-Based Programmable Architecture for Base-Band Processing.Simon Leung, Adam Postula, Ahmed Hemani
2001VLSIDHardware Software Codesign of DSP System Using Grammar Based Approach.Abhijit K. Deb, Ahmed Hemani, Johnny berg, Adam Postula, Dan Lindqvist
2000DACSystem-level data format exploration for dynamically allocated data structures.Peeter Ellervee, Miguel Miranda, Francky Catthoor, Ahmed Hemani
2000PDPTAReconfigurable Architecture for Base-band Data Processing.Simon Leung, Adam Postula, Ahmed Hemani
1999DACLowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style.Ahmed Hemani, Thomas Meincke, Shashi Kumar, Adam Postula, Thomas Olsson, Peter Nilsson, Johnny berg, Peeter Ellervee, Dan Lundqvist
1999DATEThe Rugby Model: A Conceptual Frame for the Study of Modelling, Analysis and Synthesis Concepts of Electronic Systems.Axel Jantsch, Shashi Kumar, Ahmed Hemani
1999ISCASGlobally asynchronous locally synchronous architecture for large high-performance ASICs.Thomas Meincke, Ahmed Hemani, Shashi Kumar, Peeter Ellervee, Johnny berg, Thomas Olsson, Peter Nilsson, Dan Lindqvist, Hannu Tenhunen
1999RSPSystem Level Virtual Prototyping of DSP ASICs Using Grammar Based Approach.Ahmed Hemani, Johnny berg, Abhijit K. Deb, Dan Lindqvist, Bjrn Fjellborg
1998DATEScheduling of Outputs in Grammar-based Hardware Synthesis of Data Communication Protocols.Johnny berg, Ahmed Hemani, Anshul Kumar
1998VLSIDA Methodology and Algorithms for Efficient Interprocess Communication Synthesis from System Description in SDL.Bengt Svantesson, Shashi Kumar, Ahmed Hemani
1996FPLFlexible Codesign Target Architecture for Early Prototyping of CMIST Systems.Kalle Tammeme, Mattias O'Nils, Ahmed Hemani
1996VLSIDA Rule-Based Approach for Improving Allocation of Filter Structures in HLS.Johnny berg, Jouni Isoaho, Peeter Ellervee, Axel Jantsch, Ahmed Hemani
1996VLSIDA Novell Allocation Strategy for Control and Memory Intensive Telecommunication Circiuts.Bengt Svantesson, Ahmed Hemani, Peeter Ellervee, Adam Postula, Johnny berg, Axel Jantsch, Hannu Tenhunen
1994VLSIDApplication of High-Level Synthesis in an Industrial Project.Ahmed Hemani, Brje Karlsson, Mats Fredriksson, Kurt Nordqvist, Bjrn Fjellborg
1993VLSIDSelf-Organization and its Application to Binding.Ahmed Hemani