| 2026 | ISCAS | Algorithm-Aided Design and Verification for Multiple-Node-Upset-Recovery Latches. | Zhiyuan Pei, Jing Li, Haroon Waris, M. Shahzad Younis, Aibin Yan, Jiahui Deng, Yilin Gui, Xiaoqing Wen |
| 2025 | DATE | Efficient Modulated State Space Model for Mixed-Type Wafer Defect Pattern Recognition. | Mu Nie, Shidong Zhu, Aibin Yan, Cheng Zhuo, Xiaoqing Wen, Tianming Ni |
| 2025 | DATE | NVSRLO: A FeFET-Based Non-Volatile and SEU-Recoverable Latch Design with Optimized Overhead. | Aibin Yan, Wangjin Jiang, Han Bao, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen, Patrick Girard |
| 2025 | ISCAS | TNURML: Triple-Node-Upset-Recovery Magnetic Latch Design with Non-Volatility for Aerospace Applications. | Aibin Yan, Zhiyuan Pei, Xing Guo, Jie Song, Cuiyun Jiang, Huaguo Liang, Xiaoqing Wen, Patrick Girard |
| 2024 | ISCAS | Nonvolatile and SEU-Recoverable Latch Based on FeFET and CMOS for Energy-Harvesting Devices. | Aibin Yan, Zhuoyuan Lin, Guangzhu Liu, Qingyang Zhang, Zhengfeng Huang, Jie Cui, Xiaoqing Wen, Patrick Girard |
| 2023 | DATE | High Performance and DNU-Recovery Spintronic Retention Latch for Hybrid MTJ/CMOS Technology. | Aibin Yan, Zhen Zhou, Liang Ding, Jie Cui, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard |
| 2023 | ETS | BiSTAHL: A Built-In Self-Testable Soft-Error-Hardened Scan-Cell. | Stefan Holst, Ruijun Ma, Xiaoqing Wen, Aibin Yan, Hui Xu |
| 2023 | ISCAS | Design of Low-Cost Approximate CMOS Full Adders. | Aibin Yan, Shaojie Wei, Zhixing Li, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen |
| 2022 | DATE | SCLCRL: Shuttling C-elements based Low-Cost and Robust Latch Design Protected against Triple Node Upsets in Harsh Radiation Environments. | Aibin Yan, Zhixing Li, Shiwei Huang, Zijie Zhai, Xiangyu Cheng, Jie Cui, Tianming Ni, Xiaoqing Wen, Patrick Girard |
| 2022 | VTS | A Highly Reliable and Low Power RHBD Flip-Flop Cell for Aerospace Applications. | Aibin Yan, Kuikui Qian, Jie Cui, Ningning Cui, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard |
| 2021 | ISCAS | TPDICE and Sim Based 4-Node-Upset Completely Hardened Latch Design for Highly Robust Computing in Harsh Radiation. | Aibin Yan, Liang Ding, Chuanbo Shan, Haoran Cai, Xiaofeng Chen, Zhanjun Wei, Zhengfeng Huang, Xiaoqing Wen |
| 2020 | DAC | HITTSFL: Design of a Cost-Effective HIS-Insensitive TNU-Tolerant and SET-Filterable Latch for Safety-Critical Applications. | Aibin Yan, Xiangfeng Feng, Xiaohu Zhao, Hang Zhou, Jie Cui, Zuobin Ying, Patrick Girard, Xiaoqing Wen |
| 2020 | ISCAS | Dual-Interlocked-Storage-Cell-Based Double-Node-Upset Self-Recoverable Flip-Flop Design for Safety-Critical Applications. | Aibin Yan, Zhelong Xu, Jie Cui, Zuobin Ying, Zhengfeng Huang, Huaguo Liang, Patrick Girard, Xiaoqing Wen |
| 2019 | DATE | Single-Event Double-Upset Self-Recoverable and Single-Event Transient Pulse Filterable Latch Design for Low Power Applications. | Aibin Yan, Yuanjie Hu, Jie Song, Xiaoqing Wen |
| 2019 | ETS | STAHL: A Novel Scan-Test-Aware Hardened Latch Design. | Ruijun Ma, Stefan Holst, Xiaoqing Wen, Aibin Yan, Hui Xu |
| 2019 | VTS | Novel Application of Deep Learning for Adaptive Testing Based on Long Short-Term Memory. | Tai Song, Huaguo Liang, Ying Sun, Zhengfeng Huang, Maoxiang Yi, Xiangsheng Fang, Aibin Yan |
| 2018 | ISCAS | Novel low cost and DNU online self-recoverable RHBD latch design for nanoscale CMOS. | Qian He, Aibin Yan, Chaoping Lai, Yinlei Zhang, Chunming Liu, Zhile Chen, Zhen Wu, Jie Cui, Huaguo Liang |
| 2017 | VTS | HLDTL: High-performance, low-cost, and double node upset tolerant latch design. | Aibin Yan, Zhengfeng Huang, Maoxiang Yi, Jie Cui, Huaguo Liang |