| 2018 | ISCAS | A 14-b, 850fs Fully Synthesizable Stochastic-Based Branching Time-to-Digital Converter in 65nm CMOS. | Jian Sen Teh, Liter Siek, Abdel Martinez Alonso, Anugerah Firdauzi, Akira Matsuzawa |
| 2017 | ASPDAC | W-band ultra-high data-rate 65nm CMOS wireless transceiver. | Korkut Kaan Tokgoz, Shotaro Maki, Seitarou Kawai, Noriaki Nagashima, Yoichi Kawano, Toshihide Suzuki, Taisuke Iwai, Kenichi Okada, Akira Matsuzawa |
| 2017 | ASPDAC | An HDL-synthesized injection-locked PLL using LC-based DCO for on-chip clock generation. | Dongsheng Yang, Wei Deng, Bangan Liu, Aravind Tharayil Narayanan, Teerachot Siriburanon, Kenichi Okada, Akira Matsuzawa |
| 2016 | ASPDAC | A noise reduction technique for divider-less fractional-N frequency synthesizer using phase-interpolation technique. | Aravind Tharayil Narayanan, Makihiko Katsuragi, Kengo Nakata, Yuki Terashima, Kenichi Okada, Akira Matsuzawa |
| 2016 | ASPDAC | An automatic place-and-routed two-stage fractional-N injection-locked PLL using soft injection. | Dongsheng Yang, Wei Deng, Aravind Tharayil Narayanan, Kengo Nakata, Teerachot Siriburanon, Kenichi Okada, Akira Matsuzawa |
| 2016 | ISCAS | A 74.9 dB SNDR 1 MHz bandwidth 0.9 mW delta-sigma time-to-digital converter using charge pump and SAR ADC. | Anugerah Firdauzi, Zule Xu, Masaya Miyahara, Akira Matsuzawa |
| 2015 | ASPDAC | A tail-current modulated VCO with adaptive-bias scheme. | Aravind Tharayil Narayanan, Wei Deng, Kenichi Okada, Akira Matsuzawa |
| 2015 | ASPDAC | A 58.3-to-65.4 GHz 34.2 mW sub-harmonically injection-locked PLL with a sub-sampling phase detection. | Teerachot Siriburanon, Tomohiro Ueno, Kento Kimura, Satoshi Kondo, Wei Deng, Kenichi Okada, Akira Matsuzawa |
| 2015 | ASPDAC | An HDL-synthesized gated-edge-injection PLL with a current output DAC. | Dongsheng Yang, Wei Deng, Tomohiro Ueno, Teerachot Siriburanon, Satoshi Kondo, Kenichi Okada, Akira Matsuzawa |
| 2014 | ASPDAC | A dual-loop injection-locked PLL with all-digital background calibration system for on-chip clock generation. | Wei Deng, Ahmed Musa, Teerachot Siriburanon, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa |
| 2014 | ASPDAC | A swing-enhanced current-reuse class-C VCO with dynamic bias control circuits. | Teerachot Siriburanon, Wei Deng, Kenichi Okada, Akira Matsuzawa |
| 2013 | ASPDAC | A fractional-N harmonic injection-locked frequency synthesizer with 10MHz-6.6GHz quadrature outputs for software-defined radios. | Wei Deng, Ahmed Musa, Kenichi Okada, Akira Matsuzawa |
| 2013 | ASPDAC | A full 4-channel 60 GHz direct-conversion transceiver. | Seitaro Kawai, Ryo Minami, Ahmed Musa, Takahiro Sato, Ning Li, Tatsuya Yamaguchi, Yasuaki Takeuchi, Yuki Tsukui, Kenichi Okada, Akira Matsuzawa |
| 2013 | ASPDAC | A sub-harmonic injection-locked frequency synthesizer with frequency calibration scheme for use in 60GHz TDD transceivers. | Teerachot Siriburanon, Wei Deng, Ahmed Musa, Kenichi Okada, Akira Matsuzawa |
| 2012 | ASPDAC | A PVT-robust feedback class-C VCO using an oscillation swing enhancement technique. | Wei Deng, Kenichi Okada, Akira Matsuzawa |
| 2012 | ASPDAC | A 60-GHz 16QAM 11Gbps direct-conversion transceiver in 65nm CMOS. | Ryo Minami, Hiroki Asada, Ahmed Musa, Takahiro Sato, Ning Li, Tatsuya Yamaguchi, Yasuaki Takeuchi, Win Chaivipas, Kenichi Okada, Akira Matsuzawa |
| 2012 | ASPDAC | A Progressive Mixing 20GHz ILFD with wide locking range for higher division ratios. | Ahmed Musa, Kenichi Okada, Akira Matsuzawa |
| 2011 | ASPDAC | An ultra-low-voltage LC-VCO with a frequency extension circuit for future 0.5-V clock generation. | Wei Deng, Kenichi Okada, Akira Matsuzawa |
| 2011 | ASPDAC | A 58-63.6GHz quadrature PLL frequency synthesizer using dual-injection technique. | Ahmed Musa, Rui Murakami, Takahiro Sato, Win Chaivipas, Kenichi Okada, Akira Matsuzawa |
| 2011 | ISCAS | A 15.5 dB, wide signal swing, dynamic amplifier using a common-mode voltage detection technique. | James Lin, Masaya Miyahara, Akira Matsuzawa |
| 2010 | ASPDAC | A 2-6 GHz fully integrated tunable CMOS power amplifier for multi-standard transmitters. | Daisuke Imanishi, Jee Young Hong, Kenichi Okada, Akira Matsuzawa |
| 2010 | ASPDAC | A 60GHz direct-conversion transmitter in 65nm CMOS technology. | Naoki Takayama, Kota Matsushita, Shogo Ito, Ning Li, Kenichi Okada, Akira Matsuzawa |
| 2008 | ASPDAC | A CMOS direct sampling mixer using Switched Capacitor Filter technique for software-defined radio. | Hong Phuc Ninh, Takashi Moue, Takashi Kurashina, Kenichi Okada, Akira Matsuzawa |
| 2008 | ISCAS | "The flipped voltage follower"-based low voltage fully differential CMOS sample-and-hold circuit. | Christian Jess B. Fayomi, Gilson I. Wirth, Jaime Ramrez-Angulo, Akira Matsuzawa |
| 2008 | ISCAS | Design space exploration of low-phase-noise LC-VCO using multiple-divide technique. | Shoichi Hara, Takeshi Ito, Kenichi Okada, Akira Matsuzawa |
| 2006 | ISCAS | Feedforward compensation technique for all digital phase locked loop based synthesizers. | Win Chaivipas, Akira Matsuzawa, Philipus Chandra Oh |
| 2003 | DAC | How to make efficient communication, collaboration, and optimization from system to chip. | Akira Matsuzawa |
| 1998 | ASPDAC | CMOS Image Sensors with Video Compression. | Shoji Kawahito, Yoshiaki Tadokoro, Akira Matsuzawa |
| 1998 | ASPDAC | A CMOS Smart Image Sensor LSI for Focal-Plane Compression. | Shoji Kawahito, Makoto Yoshida, Masaaki Sasaki, Daisuke Miyazaki, Yoshiaki Tadokoro, Kenji Murata, Shiro Doushou, Akira Matsuzawa |
| 1997 | ITC | Design, Fabrications and Use of Mixed-Signal IC Testability Structures. | Kenneth P. Parker, John E. McDermid, Rodney A. Browen, Kozo Nuriya, Katsuhiro Hirayama, Akira Matsuzawa |
| 1996 | ISLPED | A 0.5V/100 MHz over-VCC grounded data storage (OVGS) SRAM cell architecture with boosted bit-line and offset source over-driving schemes. | Hiroyuki Yamauchi, Toru Iwata, Hironori Akamatsu, Akira Matsuzawa |