Alexander V. Veidenbaum
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
67
Venues
28
Active years
1986–2025
Best venue rank
A*
Where they publish
- AICS10 papers
- BICPP9 papers
- CICCD7 papers
- A*ISCA5 papers
- ADATE4 papers
- ASC4 papers
- Journal PublishedCASES3 papers
- A*DAC2 papers
- A*MICRO2 papers
- AISLPED2 papers
- BPPoPP2 papers
- A*EMNLP1 paper
- A*KDD1 paper
- AFPGA1 paper
- NationalFCCM1 paper
- AMMSys1 paper
- CFDTC1 paper
- CNPC1 paper
- BCC1 paper
- CISPDC1 paper
- NationalHiPC1 paper
- BIJCNN1 paper
- NationalSYSTOR1 paper
- A*SIGMETRICS1 paper
- BEuroPar1 paper
- Journal PublishedEMSOFT1 paper
- BMASCOTS1 paper
- BSPAA1 paper
Papers
67 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | EMNLP | Grammar Pruning: Enabling Low-Latency Zero-Shot Task-Oriented Language Models for Edge AI. | Octavian Alexandru Trifan, Jason Lee Weber, Marc Titus Trifan, Alexandru Nicolau, Alexander V. Veidenbaum |
| 2023 | KDD | DotHash: Estimating Set Similarity Metrics for Link Prediction and Document Deduplication. | Igor Nunes, Mike Heddes, Pere Vergs, Danny Abraham, Alexander V. Veidenbaum, Alex Nicolau, Tony Givargis |
| 2022 | DAC | Hyperdimensional hashing: a robust and efficient dynamic hash table. | Mike Heddes, Igor Nunes, Tony Givargis, Alexandru Nicolau, Alexander V. Veidenbaum |
| 2022 | DATE | GraphHD: Efficient graph classification using hyperdimensional computing. | Igor Nunes, Mike Heddes, Tony Givargis, Alexandru Nicolau, Alexander V. Veidenbaum |
| 2019 | FPGA | AFFIX: Automatic Acceleration Framework for FPGA Implementation of OpenVX Vision Algorithms. | Sajjad Taheri, Payman Behnam, Eli Bozorgzadeh, Alexander V. Veidenbaum, Alexandru Nicolau |
| 2018 | FCCM | Acceleration Framework for FPGA Implementation of OpenVX Graph Pipelines. | Sajjad Taheri, Jin Heo, Payman Behnam, Jeffrey Chen, Alexander V. Veidenbaum, Alexandru Nicolau |
| 2018 | MMSys | OpenCV.js: computer vision processing for the open web platform. | Sajjad Taheri, Alexander V. Veidenbaum, Alexandru Nicolau, Ningxin Hu, Mohammad R. Haghighat |
| 2017 | FDTC | CAMFAS: A Compiler Approach to Mitigate Fault Attacks via Enhanced SIMDization. | Zhi Chen, Junjie Shen, Alex Nicolau, Alexander V. Veidenbaum, Nahid Farhady Ghalaty, Rosario Cammarota |
| 2014 | ICS | Author retrospective for compiler-directed data prefetching in multiprocessors with memory hierarchies. | Edward H. Gornish, Elana D. Granston, Alexander V. Veidenbaum |
| 2014 | NPC | A Compilation and Run-Time Framework for Maximizing Performance of Self-scheduling Algorithms. | Yizhuo Wang, Laleh Aghababaie Beni, Alexandru Nicolau, Alexander V. Veidenbaum, Rosario Cammarota |
| 2013 | CC | On the Determination of Inlining Vectors for Program Optimization. | Rosario Cammarota, Alexandru Nicolau, Alexander V. Veidenbaum, Arun Kejariwal, Debora Donato, Mukund Madhugiri |
| 2013 | ISPDC | Effective Evaluation of Multi-core Based Systems. | Rosario Cammarota, Laleh Aghababaie Beni, Alexandru Nicolau, Alexander V. Veidenbaum |
| 2012 | CASES | Revisiting level-0 caches in embedded processors. | Nam Duong, Taesu Kim, Dali Zhao, Alexander V. Veidenbaum |
| 2012 | HiPC | A fault tolerant self-scheduling scheme for parallel loops on shared memory systems. | Yizhuo Wang, Alexandru Nicolau, Rosario Cammarota, Alexander V. Veidenbaum |
| 2012 | MICRO | Improving Cache Management Policies Using Dynamic Reuse Distances. | Nam Duong, Dali Zhao, Taesu Kim, Rosario Cammarota, Mateo Valero, Alexander V. Veidenbaum |
| 2010 | ISLPED | Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systems. | Shahin Golshan, Eli Bozorgzadeh, Benjamin Carrin Schfer, Kazutoshi Wakabayashi, Houman Homayoun, Alexander V. Veidenbaum |
| 2009 | ICPP | Efficient Scheduling of Nested Parallel Loops on Multi-Core Systems. | Arun Kejariwal, Alexandru Nicolau, Alexander V. Veidenbaum, Utpal Banerjee, Constantine D. Polychronopoulos |
| 2009 | IJCNN | Efficient simulation of large-scale Spiking Neural Networks using CUDA graphics processors. | Jayram Moorkanikara Nageswaran, Nikil D. Dutt, Jeffrey L. Krichmar, Alex Nicolau, Alexander V. Veidenbaum |
| 2009 | ICS | Synchronization optimizations for efficient execution on multi-cores. | Alexandru Nicolau, Guangqiang Li, Alexander V. Veidenbaum, Arun Kejariwal |
| 2009 | SYSTOR | Cache-aware partitioning of multi-dimensional iteration spaces. | Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos |
| 2008 | CASES | Multiple sleep mode leakage control for cache peripheral circuits in embedded processors. | Houman Homayoun, Mohammad A. Makhzan, Alexander V. Veidenbaum |
| 2008 | DAC | Dynamic register file resizing and frequency scaling to improve embedded processor performance and energy-delay efficiency. | Houman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum |
| 2008 | ICCD | ZZ-HVS: Zig-zag horizontal and vertical sleep transistor sharing to reduce leakage power in on-chip SRAM peripheral circuits. | Houman Homayoun, Mohammad A. Makhzan, Alexander V. Veidenbaum |
| 2008 | ICCD | Adaptive techniques for leakage power management in L2 cache peripheral circuits. | Houman Homayoun, Alexander V. Veidenbaum, Jean-Luc Gaudiot |
| 2008 | ISCA | A Two-Level Load/Store Queue Based on Execution Locality. | Miquel Perics, Adrin Cristal, Francisco J. Cazorla, Rubn Gonzlez, Alexander V. Veidenbaum, Daniel A. Jimnez, Mateo Valero |
| 2008 | MICRO | A distributed processor state management architecture for large-window processors. | Isidro Gonzalez, Marco Galluzzi, Alexander V. Veidenbaum, Marco Antonio Ramrez, Adrin Cristal, Mateo Valero |
| 2008 | PPoPP | Cache-aware iteration space partitioning. | Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos |
| 2007 | CASES | A simplified java bytecode compilation system for resource-constrained embedded processors. | Carmen Badea, Alexandru Nicolau, Alexander V. Veidenbaum |
| 2007 | ICCD | Reducing leakage power in peripheral circuits of L2 caches. | Houman Homayoun, Alexander V. Veidenbaum |
| 2007 | PPoPP | Tight analysis of the performance potential of thread speculation using spec CPU 2006. | Arun Kejariwal, Xinmin Tian, Milind Girkar, Wei Li, Sergey Kozhukhov, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos |
| 2007 | SIGMETRICS | Comparative characterization of SPEC CPU2000 and CPU2006 on Itanium architecture. | Arun Kejariwal, Gerolf Hoflehner, Darshan Desai, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum |
| 2006 | EuroPar | Probablistic Self-Scheduling. | Milind Girkar, Arun Kejariwal, Xinmin Tian, Hideki Saito, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos |
| 2006 | ICCD | Fast Speculative Address Generation and Way Caching for Reducing L1 Data Cache Energy. | Dan Nicolaescu, Babak Salamat, Alexander V. Veidenbaum |
| 2006 | ICS | On the performance potential of different types of speculative thread-level parallelism: The DL version of this paper includes corrections that were not made available in the printed proceedings. | Arun Kejariwal, Xinmin Tian, Wei Li, Milind Girkar, Sergey Kozhukhov, Hideki Saito, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos |
| 2005 | EMSOFT | High performance annotation-aware JVM for Java cards. | Ana Azevedo, Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau |
| 2005 | ICCD | A New Pointer-based Instruction Queue Design and Its Power-Performance Evaluation. | Marco Antonio Ramrez, Adrin Cristal, Mateo Valero, Alexander V. Veidenbaum, Luis Villa |
| 2005 | ICS | An asymmetric clustered processor based on value content. | Rubn Gonzlez, Adrin Cristal, Miquel Perics, Mateo Valero, Alexander V. Veidenbaum |
| 2004 | DATE | Energy-Efficient Design for Highly Associative Instruction Caches in Next-Generation Embedded Processors. | Juan L. Aragn, Dan Nicolaescu, Alexander V. Veidenbaum, Ana-Maria Badulescu |
| 2004 | ICCD | Low Energy, Highly-Associative Cache Design for Embedded Processors. | Alexander V. Veidenbaum, Dan Nicolaescu |
| 2004 | ISCA | A Content Aware Integer Register File Organization. | Rubn Gonzlez, Adrin Cristal, Daniel Ortega, Alexander V. Veidenbaum, Mateo Valero |
| 2004 | MASCOTS | Caching Values in the Load Store Queue. | Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau |
| 2003 | DATE | Reducing Power Consumption for High-Associativity Data Caches in Embedded Processors. | Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau |
| 2003 | ICCD | Improving Branch Prediction Accuracy in Embedded Processors in the Presence of Context Switches. | Sudeep Pasricha, Alexander V. Veidenbaum |
| 2003 | ISLPED | Reducing data cache energy consumption via cached load/store queue. | Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau |
| 2002 | DATE | Profile-Based Dynamic Voltage Scheduling Using Program Checkpoints. | Ana Azevedo, Ilya Issenin, Radu Cornea, Rajesh Gupta, Nikil D. Dutt, Alexander V. Veidenbaum, Alexandru Nicolau |
| 1999 | ICS | Adapting cache line size to application behavior. | Alexander V. Veidenbaum, Weiyu Tang, Rajesh K. Gupta, Alexandru Nicolau, Xiaomei Ji |
| 1998 | ISCA | Retrospective: The Cedar System. | Alexander V. Veidenbaum, Pen-Chung Yew, David J. Kuck, Constantine D. Polychronopoulos, David A. Padua, Edward S. Davidson, Kyle A. Gallivan |
| 1997 | ICPP | Stride-directed Prefetching for Secondary Caches. | Sunil Kim, Alexander V. Veidenbaum |
| 1995 | SPAA | On Shortest Path Routing in Single Stage Shuffle-Exchange Networks. | Sunil Kim, Alexander V. Veidenbaum |
| 1994 | ICPP | An Integrated Hardware/Software Data Prefetching Scheme for Shared-Memory Multiprocessors. | Edward H. Gornish, Alexander V. Veidenbaum |
| 1994 | SC | Scalability of the Cedar system. | Stephen W. Turner, Alexander V. Veidenbaum |
| 1993 | ICPP | Performance Evaluation of Memory Caches in Multiprocessors. | Yung-Chin Chen, Alexander V. Veidenbaum |
| 1993 | ISCA | The Cedar System and an Initial Performance Study. | David J. Kuck, Edward S. Davidson, Duncan H. Lawrie, Ahmed H. Sameh, Chuan-Qi Zhu, Alexander V. Veidenbaum, Jeff Konicek, Pen-Chung Yew, Kyle A. Gallivan, William Jalby, Harry A. G. Wijshoff, Randall Bramley, Ulrike Meier Yang, Perry A. Emrath, David A. Padua, Rudolf Eigenmann, Jay P. Hoeflinger, Greg P. Jaxon, Zhiyuan Li, T. Murphy, John T. Andrews, Stephen W. Turner |
| 1992 | SC | An Effective Write Policy for Software Coherence Schemes. | Yung-Chin Chen, Alexander V. Veidenbaum |
| 1991 | ICPP | Preliminary Performance Analysis of the Cedar Multiprocessor Memory System. | Kyle A. Gallivan, William Jalby, Stephen W. Turner, Alexander V. Veidenbaum, Harry A. G. Wijshoff |
| 1991 | ICPP | An Integrated Hardware/Software Solution for Effective Management of Local Storage in High-Performance Systems. | Elana D. Granston, Alexander V. Veidenbaum |
| 1991 | ICPP | The Organization of the Cedar System. | Jeff Konicek, Tracy Tilton, Alexander V. Veidenbaum, Chuan-Qi Zhu, Edward S. Davidson, Ruppert A. Downing, Michael J. Haney, Manish Sharma, Pen-Chung Yew, P. Michael Farmwald, David J. Kuck, Daniel M. Lavery, Robert A. Lindsey, D. Pointer, John T. Andrews, Thomas Beck, T. Murphy, Stephen W. Turner, Nancy J. Warter |
| 1991 | ICS | A software coherence scheme with the assistance of directories. | Yung-Chin Chen, Alexander V. Veidenbaum |
| 1991 | SC | Comparison and analysis of software and directory coherence schemes. | Yung-Chin Chen, Alexander V. Veidenbaum |
| 1991 | SC | Detecting redundant accesses to array data. | Elana D. Granston, Alexander V. Veidenbaum |
| 1990 | ICS | Compiler-directed data prefetching in multiprocessors with memory hierarchies. | Edward H. Gornish, Elana D. Granston, Alexander V. Veidenbaum |
| 1989 | ICS | A version control approach to Cache coherence. | Hoichi Cheong, Alexander V. Veidenbaum |
| 1988 | ICPP | Stale Data Detection and Coherence Enforcement Using Flow Analysis. | Hoichi Cheong, Alexander V. Veidenbaum |
| 1988 | ISCA | A Cache Coherence Scheme With Fast Selective Invalidation. | Hoichi Cheong, Alexander V. Veidenbaum |
| 1988 | ICS | Performance of a shared memory system for vector multiprocessors. | Stephen W. Turner, Alexander V. Veidenbaum |
| 1987 | ICS | The Performance of Software-managed Multiprocessor Caches on Parallel Numerical Programs. | Hoichi Cheong, Alexander V. Veidenbaum |
| 1986 | ICPP | A Compiler-Assisted Cache Coherence Solution for Multiprcessors. | Alexander V. Veidenbaum |