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Andreas Gerstlauer

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

63

Venues

27

Active years

2002–2026

Best venue rank

A*

Where they publish

Papers

63 indexed papers, newest first.

YearVenueTitleAuthors
2026DATEExplainable GNN-Driven Test Point Insertion on Uncontrollable I/Os.Sung-Hyuk Cho, Tae-Min Park, Jeongyeol Lee, Jae-Youn Hong, Andreas Gerstlauer, Joon-Sung Yang
2026DATEDynamic Voltage, Body Bias and Frequency Scaling for FD-SOI-Based Low-Power Edge Processors.Shrihari Gokulachandran, Navneet Jain, Andreas Gerstlauer
2025FCCMHighWave: Large-Scale High-Bandwidth Wave Simulations on FPGAs.Dimitrios Gourounas, Austin G. James, Bagus Hanindhito, Arash Fathi, Lizy K. John, Andreas Gerstlauer
2025ICPPViReC: The Virtual Register Context Architecture for Efficient Near-Memory Multithreading.Matthew Barondeau, Sophia Jiang, Jonathan Beard, Andreas Gerstlauer
2024FCCMEfficient Approaches for GEMM Acceleration on Leading AI-Optimized FPGAs.Endri Taka, Dimitrios Gourounas, Andreas Gerstlauer, Diana Marculescu, Aman Arora
2023ECRTSMemory Latency Distribution-Driven Regulation for Temporal Isolation in MPSoCs.Ahsan Saeed, Denis Hoornaert, Dakshina Dasari, Dirk Ziegenbein, Daniel Mueller-Gritschneder, Ulf Schlichtmann, Andreas Gerstlauer, Renato Mancuso
2023FPGALAWS: Large-Scale Accelerated Wave Simulations on FPGAs.Dimitrios Gourounas, Bagus Hanindhito, Arash Fathi, Dimitar Trenev, Lizy Kurian John, Andreas Gerstlauer
2022ICSGAPS: GPU-acceleration of PDE solvers for wave simulation.Bagus Hanindhito, Dimitrios Gourounas, Arash Fathi, Dimitar Trenev, Andreas Gerstlauer, Lizy K. John
2022RTASMemory Utilization-Based Dynamic Bandwidth Regulation for Temporal Isolation in Multi-Cores.Ahsan Saeed, Dakshina Dasari, Dirk Ziegenbein, Varun Rajasekaran, Falk Rehm, Michael Pressler, Arne Hamann, Daniel Mueller-Gritschneder, Andreas Gerstlauer, Ulf Schlichtmann
2021ASPDACApproximate Computing for ML: State-of-the-art, Challenges and Visions.Georgios Zervakis, Hassaan Saadat, Hussam Amrouch, Andreas Gerstlauer, Sri Parameswaran, Jrg Henkel
2021ICPPWave-PIM: Accelerating Wave Simulation Using Processing-in-Memory.Bagus Hanindhito, Ruihao Li, Dimitrios Gourounas, Arash Fathi, Karan Govil, Dimitar Trenev, Andreas Gerstlauer, Lizy Kurian John
2020DATERuntime Accuracy-Configurable Approximate Hardware Synthesis Using Logic Gating and Relaxation.Tanfer Alan, Andreas Gerstlauer, Jrg Henkel
2020DATEEnergy Optimization in NCFET-based Processors.Sami Salamin, Martin Rapp, Hussam Amrouch, Andreas Gerstlauer, Jrg Henkel
2020PDPThe Non-Uniform Compute Device (NUCD) Architecture for Lightweight Accelerator Offload.Mochamad Asri, Curtis Dunham, Roxana Rusitoru, Andreas Gerstlauer, Jonathan Beard
2020PDPOff-Chip Congestion Management for GPU-based Non-Uniform Processing-in-Memory Networks.Kishore Punniyamurthy, Andreas Gerstlauer
2020VLSIDCacheline Utilization-Aware Link Traffic Compression for Modular GPUs.Kishore Punniyamurthy, Shomit Das, Andreas Gerstlauer
2019ISCASAging Gracefully with Approximation.Jongho Kim, Heesu Kim, Hussam Amrouch, Jrg Henkel, Andreas Gerstlauer, Kiyoung Choi
2018ASPDACBUQS: Battery- and user-aware QoS scaling for interactive mobile devices.Wooseok Lee, Reena Panda, Dam Sunwoo, Jos A. Joao, Andreas Gerstlauer, Lizy K. John
2018DATECAMP: Accurate modeling of core and memory locality for proxy generation of big-data applications.Reena Panda, Xinnian Zheng, Andreas Gerstlauer, Lizy Kurian John
2018ICCDTrading Off Temperature Guardbands via Adaptive Approximations.Behzad Boroujerdian, Hussam Amrouch, Jrg Henkel, Andreas Gerstlauer
2018SCOPESMASES: Mobility And Slack Enhanced Scheduling For Latency-Optimized Pipelined Dataflow Graphs.Wenxiao Yu, Jacob Kornerup, Andreas Gerstlauer
2017DACTowards Aging-Induced Approximations.Hussam Amrouch, Behnam Khaleghi, Andreas Gerstlauer, Jrg Henkel
2017DACStatistical Pattern Based Modeling of GPU Memory Access Streams.Reena Panda, Xinnian Zheng, Jiajun Wang, Andreas Gerstlauer, Lizy K. John
2017DATEHigh-level synthesis of approximate hardware under joint precision and voltage scaling.Seogoo Lee, Lizy K. John, Andreas Gerstlauer
2017DATEGATSim: Abstract timing simulation of GPUs.Kishore Punniyamurthy, Behzad Boroujerdian, Andreas Gerstlauer
2017DATESampling-based binary-level cross-platform performance estimation.Xinnian Zheng, Haris Vikalo, Shuang Song, Lizy K. John, Andreas Gerstlauer
2017ICSECloud-Guided QoS and Energy Management for Mobile Interactive Web Applications.Wooseok Lee, Dam Sunwoo, Andreas Gerstlauer, Lizy K. John
2016DACReliability-aware design to suppress aging.Hussam Amrouch, Behnam Khaleghi, Andreas Gerstlauer, Jrg Henkel
2016DACAccurate phase-level cross-platform power and performance estimation.Xinnian Zheng, Lizy K. John, Andreas Gerstlauer
2016ICPPProxy-Guided Load Balancing of Graph Processing Workloads on Heterogeneous Clusters.Shuang Song, Meng Li, Xinnian Zheng, Michael LeBeane, Jee Ho Ryoo, Reena Panda, Andreas Gerstlauer, Lizy K. John
2016WSCAdaptive resolution control in distributed cyber-physical system simulation.Dylan Pfeifer, Andreas Gerstlauer, Jonathan Valvano
2015DATEThe next generation of virtual prototyping: ultra-fast yet accurate simulation of HW/SW systems.Oliver Bringmann, Wolfgang Ecker, Andreas Gerstlauer, Ajay Goyal, Daniel Mueller-Gritschneder, Prasanth Sasidharan, Simranjit Singh
2015DATEDynamic power and performance back-annotation for fast and accurate functional hardware simulation.Dongwook Lee, Lizy K. John, Andreas Gerstlauer
2015ICCADLearning-Based Power Modeling of System-Level Black-Box IPs.Dongwook Lee, Taemin Kim, Kyungtae Han, Yatin Hoskote, Lizy K. John, Andreas Gerstlauer
2015ISLPEDPowerTrain: A learning-based calibration of McPAT power models.Wooseok Lee, Youngchun Kim, Jee Ho Ryoo, Dam Sunwoo, Andreas Gerstlauer, Lizy K. John
2014ICCADMulti-level approximate logic synthesis under general error constraints.Jin Miao, Andreas Gerstlauer, Michael Orshansky
2014ICPADSPerformance analysis of HPC applications with irregular tree data structures.Ahmed Khawaja, Jiajun Wang, Andreas Gerstlauer, Lizy K. John, Dhairya Malhotra, George Biros
2013ARITHFloating Point Architecture Extensions for Optimized Matrix Factorization.Ardavan Pedram, Andreas Gerstlauer, Robert A. van de Geijn
2013ICCADApproximate logic synthesis under general error magnitude and frequency constraints.Jin Miao, Andreas Gerstlauer, Michael Orshansky
2013PADSDynamic resolution in distributed cyber-physical system simulation.Dylan Pfeifer, Andreas Gerstlauer, Jonathan Valvano
2012ACSSCImplementation of a real-time wireless interference alignment network.Jackson W. Massey, Jonathan Starr, Seogoo Lee, Dongwook Lee, Andreas Gerstlauer, Robert W. Heath Jr.
2012ASPDACAbstract system-level models for early performance and power exploration.Andreas Gerstlauer, Suhas Chakravarty, Manan Kathuria, Parisa Razaghi
2012ASPDACAutomatic timing granularity adjustment for host-compiled software simulation.Parisa Razaghi, Andreas Gerstlauer
2012ICCADModeling and synthesis of quality-energy optimal approximate adders.Jin Miao, Ku He, Andreas Gerstlauer, Michael Orshansky
2012SBAC-PADOn the Efficiency of Register File versus Broadcast Interconnect for Collective Communications in Data-Parallel Hardware Accelerators.Ardavan Pedram, Andreas Gerstlauer, Robert A. van de Geijn
2011ASPDACMulti-core parallel simulation of System-level Description Languages.Rainer Dmer, Weiwei Chen, Xu Han, Andreas Gerstlauer
2011DATEControlled timing-error acceptance for low energy IDCT design.Ku He, Andreas Gerstlauer, Michael Orshansky
2011DATEHost-compiled multicore RTOS simulator for embedded real-time software development.Parisa Razaghi, Andreas Gerstlauer
2011ICASSPHeterogeneous multiprocessor mapping for real-time streaming systems.Jing Lin, Akshaya Srivatsa, Andreas Gerstlauer, Brian L. Evans
2011VTCReal-Time Optimization of Video Transmission in a Network of AAVs.Ahmed Abdel-Hadi, Jonas Michel, Andreas Gerstlauer, Sriram Vishwanath
2010ASPDACPlatform modeling for exploration and synthesis.Andreas Gerstlauer, Gunar Schirner
2010ASPDACSystem-level development of embedded software.Gunar Schirner, Andreas Gerstlauer, Rainer Dmer
2010RSPHost-compiled simulation of multi-core platforms.Andreas Gerstlauer
2010RSPHost-compiled simulation of multi-core platforms.Andreas Gerstlauer
2009ASPDACIntroduction to hardware-dependent software design hardware-dependent software for multi- and many-core embedded systems.Rainer Dmer, Andreas Gerstlauer, Wolfgang Mller
2008ASPDACAutomatic generation of hardware dependent software for MPSoCs from abstract system specifications.Gunar Schirner, Andreas Gerstlauer, Rainer Dmer
2008DACSpecify-explore-refine (SER): from specification to implementation.Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Daniel Gajski, Atsushi Nakamura, Dai Araki, Yuuji Nishihara
2007ASPDACAbstract, Multifaceted Modeling of Embedded Processors for System Level Design.Gunar Schirner, Andreas Gerstlauer, Rainer Dmer
2005ASPDACMulti-metric and multi-entity characterization of applications for early system design exploration.Lukai Cai, Andreas Gerstlauer, Daniel Gajski
2005ASPDACSystem-level communication modeling for network-on-chip synthesis.Andreas Gerstlauer, Dongwan Shin, Rainer Dmer, Daniel D. Gajski
2004DACRetargetable profiling for rapid, early system-level design space exploration.Lukai Cai, Andreas Gerstlauer, Daniel Gajski
2003DATERTOS Modeling for System Level Design.Andreas Gerstlauer, Haobo Yu, Daniel Gajski
2002SMCSeamless approach for the design of control systems for power electronics and electric drives.Slim Ben Saoud, Daniel D. Gajski, Andreas Gerstlauer