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Anmol Mathur

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

17

Venues

7

Active years

1994–2025

Best venue rank

A*

Where they publish

Papers

17 indexed papers, newest first.

YearVenueTitleAuthors
2025TenconScalable Face Recognition with Multiple Deep Learning Model Integration.Pawan K. Ajmera, Ramakant Soni, Anmol Mathur, Jayesh Harlalka, Vipin Saraogi
2022PIMRCDeep-Learning Based Beam Selection Technique for 6G Millimeter Wave Communication.Satya Kumar Vankayala, Swaraj Kumar, Thirumulanathan D, Anmol Mathur, Seungil Yoon, Issaac Kommineni
2009DACNon-cycle-accurate sequential equivalence checking.Pankaj Chauhan, Deepak Goyal, Gagan Hasteer, Anmol Mathur, Nikhil Sharma
2009VLSIDPower Reduction Techniques and Flows at RTL and System Level.Anmol Mathur, Qi Wang
2007DACDesign for Verification in System-level Models and RTL.Anmol Mathur, Venkat Krishnaswamy
2006VLSIDSequential Equivalence Checking.Anmol Mathur, Masahiro Fujita, M. Balakrishnan, Raj S. Mitra
2005ICCADEmbedded tutorial: formal equivalence checking between system-level models and RTL.Alfred Klbl, Yuan Lu, Anmol Mathur
2003VLSIDGraph Transformations for Improved Tree Height Reduction.G. N. Mangalam, Sanjiv Narayan, Paul van Besouw, LaNae J. Avra, Anmol Mathur, Sanjeev Saluja
2001DACImproved Merging of Datapath Operators using Information Content and Required Precision Analysis.Anmol Mathur, Sanjeev Saluja
1998DACAn Implicit Algorithm for Finding Steady States and its Application to FSM Verification.Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee
1998ICCADEfficient equivalence checking of multi-phase designs using retiming.Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee
1997DACAn Efficient Assertion Checker for Combinational Properties.Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee
1997DATERATAN: A tool for rate analysis and rate constraint debugging for embedded systems.Ali Dasdan, Anmol Mathur, Rajesh K. Gupta
1996DATETiming Driven Placement Reconfiguration for Fault Tolerance and Yield Enhancement in FPGAs.Anmol Mathur, C. L. Liu
1995FPGAApplications of Slack Neighborhood Graphs to Timing Driven Optimization Problems in FPGAs.Anmol Mathur, Kuang-Chien Chen, C. L. Liu
1995ICCADRe-engineering of timing constrained placements for regular architectures.Anmol Mathur, Kuang-Chien Chen, C. L. Liu
1994ICCADCompression-relaxation: a new approach to performance driven placement for regular architectures.Anmol Mathur, C. L. Liu