| 2009 | ITC | Test access mechanism for multiple identical cores. | Grady Giles, Jing Wang, Anuja Sehgal, Kedarnath J. Balakrishnan, James Wingfield |
| 2008 | ITC | Test Access Mechanism for Multiple Identical Cores. | Grady Giles, Jing Wang, Anuja Sehgal, Kedarnath J. Balakrishnan, James Wingfield |
| 2007 | ITC | Test cost reduction for the AMD™ Athlon processor using test partitioning. | Anuja Sehgal, Jeff Fitzgerald, Jeff Rearick |
| 2006 | DATE | Hierarchy-aware and area-efficient test infrastructure design for core-based system chips. | Anuja Sehgal, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty |
| 2005 | DATE | Test Planning for Mixed-Signal SOCs with Wrapped Analog Cores. | Anuja Sehgal, Fang Liu, Sule Ozev, Krishnendu Chakrabarty |
| 2005 | ICCAD | Test planning for the effective utilization of port-scalable testers for heterogeneous core-based SOCs. | Anuja Sehgal, Krishnendu Chakrabarty |
| 2005 | ICCD | A Flexible Design Methodology for Analog Test Wrappers in Mixed-Signal SOCs. | Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty |
| 2004 | DATE | Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures. | Anuja Sehgal, Krishnendu Chakrabarty |
| 2004 | ITC | IEEE P1500-Compliant Test Wrapper Design for Hierarchical Cores. | Anuja Sehgal, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty |
| 2003 | DAC | Test cost reduction for SOCs using virtual TAMs and lagrange multipliers. | Anuja Sehgal, Vikram Iyengar, Mark D. Krasniewski, Krishnendu Chakrabarty |
| 2003 | ETS | Yield analysis for repairable embedded memories. | Anuja Sehgal, Aishwarya Dubey, Erik Jan Marinissen, Clemens Wouters, Harald P. E. Vranken, Krishnendu Chakrabarty |
| 2003 | ICCAD | TAM Optimization for Mixed-Signal SOCs using Analog Test Wrappers. | Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty |