Anurag Tiwari
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
5
Active years
2003–2022
Best venue rank
B
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2022 | ICONIP | A Multiclass EEG Signal Classification Model Using Channel Interaction Maximization and Multivariate Empirical Mode Decomposition. | Pankaj Kumar Jha, Anurag Tiwari, Amrita Chaturvedi |
| 2019 | IROS | A Multiclass EEG Signal Classification Model using Spatial Feature Extraction and XGBoost Algorithm. | Anurag Tiwari, Amrita Chaturvedi |
| 2013 | VLSID | A 140A 34ppm/°C 30MHz Clock Oscillator in 28nm CMOS Bulk Process. | Abhirup Lahiri, Anurag Tiwari |
| 2004 | DATE | Saving Power by Mapping Finite-State Machines into Embedded Memory Blocks in FPGAs. | Anurag Tiwari, Karen A. Tomko |
| 2003 | ASPDAC | Scan-chain based watch-points for efficient run-time debugging and verification of FPGA designs. | Anurag Tiwari, Karen A. Tomko |