Arun N. Chandorkar
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
2004–2014
Best venue rank
National
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2014 | VLSID | Hardware Efficient VLSI Architecture for 3-D Discrete Wavelet Transform. | Anand D. Darji, Saurabh Shukla, S. N. Merchant, Arun N. Chandorkar |
| 2012 | ISCAS | Hardware efficient recursive VLSI architecture for multilevel lifting 2-D DWT. | Anand D. Darji, Nisarg Trivedi, S. N. Merchant, Arun N. Chandorkar |
| 2006 | ITC | On-chip Test and Repair of Memories for Static and Dynamic Faults. | Sanjay K. Thakur, Rubin A. Parekhji, Arun N. Chandorkar |
| 2004 | VLSID | Built-in Self-test Technique for Selective Detection of Neighbourhood Pattern Sensitive Faults in Memories. | Rajeshwar S. Sable, Ravindra P. Saraf, Rubin A. Parekhji, Arun N. Chandorkar |