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Ashutosh Dhar

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

6

Venues

5

Active years

2015–2020

Best venue rank

A*

Where they publish

Papers

6 indexed papers, newest first.

YearVenueTitleAuthors
2020MICROFReaC Cache: Folded-logic Reconfigurable Computing in the Last Level Cache.Ashutosh Dhar, Xiaohao Wang, Hubertus Franke, Jinjun Xiong, Jian Huang, Wen-Mei W. Hwu, Nam Sung Kim, Deming Chen
2020VLSIDLeveraging Dynamic Partial Reconfiguration with Scalable ILP Based Task Scheduling.Ashutosh Dhar, Mang Yu, Wei Zuo, Xiaohao Wang, Nam Sung Kim, Deming Chen
2019ICCADNAIS: Neural Architecture and Implementation Search and its Applications in Autonomous Driving.Cong Hao, Yao Chen, Xinheng Liu, Atif Sarwari, Daryl Sew, Ashutosh Dhar, Bryan Wu, Dongdong Fu, Jinjun Xiong, Wen-Mei Hwu, Junli Gu, Deming Chen
2018MICROApplication-Transparent Near-Memory Processing Architecture with Memory Channel Network.Mohammad Alian, Seungwon Min, Hadi Asgharimoghaddam, Ashutosh Dhar, Dong Kai Wang, Thomas Roewer, Adam J. McPadden, Oliver O'Halloran, Deming Chen, Jinjun Xiong, Daehoon Kim, Wen-Mei W. Hwu, Nam Sung Kim
2017FCCMEfficient GPGPU Computing with Cross-Core Resource Sharing and Core Reconfiguration.Ashutosh Dhar, Deming Chen
2015DATEA scalable and high-density FPGA architecture with multi-level phase change memory.Chunan Wei, Ashutosh Dhar, Deming Chen