Bastien Giraud
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
14
Venues
6
Active years
2007–2026
Best venue rank
A
Where they publish
Papers
14 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ETS | A Ferroelectric nvSRAM PUF with Built-In Grey Bit Masking based on FeCAP-SRAM Interactions. | Lucas Rhetat, Jean-Philippe Noel, Bastien Giraud, Laurent Grenouillet, Cdric Marchand, Ian O'Connor |
| 2025 | IOLTS | Improving Error Correction with Weak-Bit Information in Resistive Memories. | Valentin Gherman, Giuseppe Piccolboni, Zeev Freidin, Matan Guttman, Amir Regev, Gabriel Molas, Ishai Naveh, Bastien Giraud, Antoine Hebert, Ilan Sever |
| 2023 | DATE | Binary ReRAM-based BNN first-layer implementation. | Mona Ezzadeen, Atreya Majumdar, Sigrid Thomas, Jean-Philippe Nol, Bastien Giraud, Marc Bocquet, Franois Andrieu, Damien Querlioz, Jean-Michel Portal |
| 2021 | DATE | Storage Class Memory with Computing Row Buffer: A Design Space Exploration. | Valentin Egloff, Jean-Philippe Noel, Maha Kooli, Bastien Giraud, Lorenzo Ciampolini, Roman Gauchi, Csar Fuguet Tortolero, Eric Guthmuller, Mathieu Moreau, Jean-Michel Portal |
| 2020 | DATE | Binary Linear ECCs Optimized for Bit Inversion in Memories with Asymmetric Error Probabilities. | Valentin Gherman, Samuel Evain, Bastien Giraud |
| 2020 | DATE | Computational SRAM Design Automation using Pushed-Rule Bitcells for Energy-Efficient Vector Processing. | Jean-Philippe Nol, Valentin Egloff, Maha Kooli, Roman Gauchi, Jean-Michel Portal, Henri-Pierre Charles, Pascal Vivet, Bastien Giraud |
| 2020 | ISLPED | Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization. | Roman Gauchi, Valentin Egloff, Maha Kooli, Jean-Philippe Nol, Bastien Giraud, Pascal Vivet, Subhasish Mitra, Henri-Pierre Charles |
| 2018 | DATE | Smart instruction codes for in-memory computing architectures compatible with standard SRAM interfaces. | Maha Kooli, Henri-Pierre Charles, Clment Touzet, Bastien Giraud, Jean-Philippe Noel |
| 2017 | ISCAS | Design methodology for area and energy efficient OxRAM-based non-volatile flip-flop. | Mahesh Nataraj, Alexandre Levisse, Bastien Giraud, Jean-Philippe Nol, Pascal Andreas Meinerzhagen, Jean-Michel Portal, Pierre-Emmanuel Gaillardon |
| 2017 | RSP | Software platform dedicated for in-memory computing circuit evaluation. | Maha Kooli, Henri-Pierre Charles, Clment Touzet, Bastien Giraud, Jean-Philippe Nol |
| 2013 | DATE | Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs. | Edith Beign, Alexandre Valentian, Bastien Giraud, Olivier Thomas, Thomas Benoist, Yvain Thonnart, Serge Bernard, Guillaume Moritz, Olivier Billoint, Y. Maneglia, Philippe Flatresse, Jean-Philippe Noel, Fady Abouzeid, Bertrand Pelloux-Prayer, Anuj Grover, Sylvain Clerc, Philippe Roche, Julien Le Coz, Sylvain Engels, Robin Wilson |
| 2009 | ISCAS | SRAM Voltage and Current Sense Amplifiers in sub-32nm Double-gate CMOS Insensitive to Process Variations and Transistor Mismatch. | Piotr Nasalski, Adam Makosiej, Bastien Giraud, Andrei Vladimirescu, Amara Amara |
| 2008 | ISCAS | A novel 4T asymmetric single-ended SRAM cell in sub-32 nm double gate technology. | Bastien Giraud, Amara Amara |
| 2007 | ISCAS | A Comparative Study of 6T and 4T SRAM Cells in Double-Gate CMOS with Statistical Variation. | Bastien Giraud, Amara Amara, Andrei Vladimirescu |