Benoit Nadeau-Dostie
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
17
Venues
3
Active years
1989–2024
Best venue rank
A
Where they publish
Papers
17 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | ETS | Combining Built-In Redundancy Analysis with ECC for Memory Testing. | Luc Romain, Paul-Patrick Nordmann, Benoit Nadeau-Dostie, Lori Schramm, Martin Keim |
| 2023 | ITC | Transitioning eMRAM from Pilot Project to Volume Production. | Cyrille Dray, Khushal Gelda, Benoit Nadeau-Dostie, Wei Zou, Luc Romain, Jongsin Yun, Harshitha Kodali, Lori Schramm, Martin Keim |
| 2022 | ITC | Configurable BISR Chain For Fast Repair Data Loading. | Wei Zou, Benoit Nadeau-Dostie |
| 2020 | ETS | MBIST Support for Reliable eMRAM Sensing. | Jongsin Yun, Benoit Nadeau-Dostie, Martin Keim, Cyrille Dray, El Mehdi Boujamaa |
| 2020 | ITC | Memory repair logic sharing techniques and their impact on yield. | Benoit Nadeau-Dostie, Luc Romain |
| 2020 | ITC | MBIST Supported Multi Step Trim for Reliable eMRAM Sensing. | Jongsin Yun, Benoit Nadeau-Dostie, Martin Keim, Lori Schramm, Cyrille Dray, El Mehdi Boujamaa, Khushal Gelda |
| 2012 | VTS | Test generator with preselected toggling for low power built-in self-test. | Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, Benoit Nadeau-Dostie |
| 2009 | ITC | Test point insertion using functional flip-flops to drive control points. | Joon-Sung Yang, Benoit Nadeau-Dostie, Nur A. Touba |
| 2008 | ITC | Power-Aware At-Speed Scan Test Methodology for Circuits with Synchronous Clocks. | Benoit Nadeau-Dostie, Kiyoshi Takeshita, Jean-Francois Cote |
| 2006 | ITC | OCI: Open Compression Interface. | Bruce Cory, Rohit Kapur, Mick Tegethoff, Mark Kassab, Brion L. Keller, Kee Sup Kim, Dwayne Burek, Steven F. Oakland, Benoit Nadeau-Dostie |
| 2002 | ITC | Complete, Contactless I/O Testing - Reaching the Boundary in Minimizing Digital IC Testing Cost. | Stephen K. Sunter, Benoit Nadeau-Dostie |
| 1999 | ITC | An embedded technique for at-speed interconnect testing. | Benoit Nadeau-Dostie, Jean-Francois Cote, Harry Hulvershorn, Stephen Pateras |
| 1995 | ITC | A New Hardware Fault Insertion Scheme for System Diagnostics Verification. | Benoit Nadeau-Dostie, Harry Hulvershorn, Saman Adham |
| 1992 | ITC | ScanBIST: A Multi-frequency Scan-based BIST Method. | Benoit Nadeau-Dostie, Dwayne Burek, Abu S. M. Hassan |
| 1992 | VTS | Scan testing of latch arrays. | Michael M. Y. Hui, Benoit Nadeau-Dostie |
| 1990 | ITC | A new procedure for weighted random built-in self-test. | Fidel Muradali, Vinod K. Agarwal, Benoit Nadeau-Dostie |
| 1989 | ITC | Testing of Glue Logic Interconnects Using Boundary Scan Architecture. | Abu S. M. Hassan, Vinod K. Agarwal, Janusz Rajski, Benoit Nadeau-Dostie |