Bhaskar Chatterjee
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
3
Active years
2002–2004
Best venue rank
A
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2004 | ISCAS | Modeling and designing energy-delay optimized wide domino circuits. | Christine Kwong, Bhaskar Chatterjee, Manoj Sachdev |
| 2004 | ISLPED | A CPL-based dual supply 32-bit ALU for sub 180nm CMOS technologies. | Bhaskar Chatterjee, Manoj Sachdev, Ram Krishnamurthy |
| 2004 | ITC | A DFT Technique for Delay Fault Testability and Diagnostics in 32-Bit High Performance CMOS ALUs. | Bhaskar Chatterjee, Manoj Sachdev, Ali Keshavarzi |
| 2003 | ISLPED | Effectiveness and scaling trends of leakage control techniques for sub-130nm CMOS technologies. | Bhaskar Chatterjee, Manoj Sachdev, Steven Hsu, Ram Krishnamurthy, Shekhar Borkar |
| 2002 | ITC | A DFT Technique for Low Frequency Delay Fault Testing in High Performance Digital Circuits. | Bhaskar Chatterjee, Manoj Sachdev, Ali Keshavarzi |