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Bogdan Pasca

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

35

Venues

4

Active years

2009–2025

Best venue rank

B

Where they publish

Papers

35 indexed papers, newest first.

YearVenueTitleAuthors
2025FPLMaximum FPGA: A 32K-Point 32-Parallel Floating Point FFT.Martin Langhammer, Bogdan Pasca
2024ARITHMultiplier Architecture with a Carry-Based Partial Product Encoding.Martin Langhammer, Bogdan Pasca, Igor Kucherenko
2024FCCMif-ZKP: Intel FPGA-Based Acceleration of Zero Knowledge Proofs.Shahzad Ahmad Butt, Benjamin Reynolds, Veeraraghavan Ramamurthy, Xiao Xiao, Pohrong Chu, Setareh Sharifian, Sergey Gribok, Bogdan Pasca
2024FCCMEfficient 8-bit Matrix Multiplication on Intel Agilex-5 FPGAs.Sergey Gribok, Bogdan Pasca
2024FPLFPGA Modular Multipliers using Hybrid Reduction Techniques.Sergey Gribok, Martin Langhammer, Bogdan Pasca
2023ARITHExtracting low-precision floating-point adders from embedded hard FP DSP Blocks on FPGAs.Bogdan Pasca, Martin Langhammer
2023FPGACSAIL2019 Crypto-Puzzle Solver Architecture.Sergey Gribok, Bogdan Pasca, Martin Langhammer
2022FCCMLow-Latency Modular Exponentiation for FPGAs.Martin Langhammer, Sergey Gribok, Bogdan Pasca
2021FPGAStratix 10 NX Architecture and Applications.Martin Langhammer, Eriko Nurvitadhi, Bogdan Pasca, Sergey Gribok
2021FPGAFolded Integer Multiplication for FPGAs.Martin Langhammer, Bogdan Pasca
2021FPGAEfficient FPGA Modular Multiplication Implementation.Martin Langhammer, Bogdan Pasca
2021FPLDense FPGA Compute Using Signed Byte Tuples.Martin Langhammer, Simon Finn, Sergey Gribok, Bogdan Pasca
2019ARITHHybrid Dot-Product Design for FP-Enabled FPGAs.Bogdan Pasca
2019FCCMHigh Precision, High Performance FPGA Adders.Martin Langhammer, Bogdan Pasca, Gregg Baeckler
2019FCCMWhy Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs.Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil C. Knag, Raghavan Kumar, Ram Krishnamurthy, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Debbie Marr, Aravind Dasu
2019FPGAEvaluating and Enhancing Intel Stratix 10 FPGAs for Persistent Real-Time AI.Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil C. Knag, Raghavan Kumar, Ram Krishnamurthy, Debbie Marr, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Aravind Dasu
2019FPLExtracting INT8 Multipliers from INT18 Multipliers.Martin Langhammer, Bogdan Pasca, Gregg Baeckler, Sergey Gribok
2018FPGAHigh-Performance QR Decomposition for FPGAs.Martin Langhammer, Bogdan Pasca
2018FPLActivation Function Architectures for FPGAs.Bogdan Pasca, Martin Langhammer
2017ARITHFlexible Fixed-Point Function Generation for FPGAs.Matei Istoan, Bogdan Pasca
2017ARITHFloating Point Tangent Implementation for FPGAs.Martin Langhammer, Bogdan Pasca
2016ARITHSingle Precision Natural Logarithm Architecture for Hard Floating-Point and DSP-Enabled FPGAs.Martin Langhammer, Bogdan Pasca
2015ARITHDesign and Implementation of an Embedded FPGA Floating Point DSP Block.Martin Langhammer, Bogdan Pasca
2015FPGAFloating-Point DSP Block Architecture for FPGAs.Martin Langhammer, Bogdan Pasca
2015FPGAHigh-Level Design Tools for Floating Point FPGAs.Deshanand P. Singh, Bogdan Pasca, Tomasz S. Czajkowski
2014FPLLow-cost multiplier-based FPU for embedded processing on FPGA.Bogdan Pasca
2013FCCMElementary Function Implementation with Optimized Sub Range Polynomial Evaluation.Martin Langhammer, Bogdan Pasca
2013FPGAFaithful single-precision floating-point tangent for FPGAs.Martin Langhammer, Bogdan Pasca
2013FPLEfficient floating-point polynomial evaluation on FPGAS.Martin Langhammer, Bogdan Pasca
2012FPLCorrectly rounded floating-point division for DSP-enabled FPGAs.Bogdan Pasca
2011FPLFPGA-Specific Arithmetic Optimizations of Short-Latency Adders.Hong Diep Nguyen, Bogdan Pasca, Thomas B. Preuer
2010FPLMultiplicative Square Root Algorithms for FPGAs.Florent de Dinechin, Mioara Joldes, Bogdan Pasca, Guillaume Revy
2010FPLPipelined FPGA Adders.Florent de Dinechin, Hong Diep Nguyen, Bogdan Pasca
2009FPLGenerating high-performance custom floating-point pipelines.Florent de Dinechin, Cristian Klein, Bogdan Pasca
2009FPLLarge multipliers with fewer DSP blocks.Florent de Dinechin, Bogdan Pasca