Channakeshav
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2002–2003
Best venue rank
A
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2003 | FPGA | A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme. | Kuan Zhou, Michael Chu, Chao You, Jong-Ru Guo, Channakeshav, John Mayega, John F. McDonald, Russell P. Kraft, Bryan S. Goda |
| 2002 | FPL | Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques. | Channakeshav, Kuan Zhou, Jong-Ru Guo, Chao You, Bryan S. Goda, Russell P. Kraft, John F. McDonald |