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Chunhong Chen

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

20

Venues

8

Active years

1999–2026

Best venue rank

C

Where they publish

Papers

20 indexed papers, newest first.

YearVenueTitleAuthors
2026ISCASHigh-Speed Area-Efficient Adder Design with SET-MOS Technology.Jingping Zhang, Chunhong Chen
2018ISCASA Triple-Point Model for Circuit-Level Reliability Analysis.Chunhong Chen, Jinchen Cai, Suoyue Zhan
2017QRSCircuit Reliability Analysis Using Signal Reliability Correlations.Jinchen Cai, Chunhong Chen
2015ISCASPower optimization design for probabilistic logic circuits.Ran Xiao, Chunhong Chen
2014ISCASImplementation of the conscience mechanism using single-electron transfer in competitive learning.Ran Xiao, Chunhong Chen
2009ISLPEDPower-management-based Chien search for low power BCH decoder.Shu-Yi Wong, Chunhong Chen, Q. M. Jonathan Wu
2008ISCASProtocol-level performance analysis for anti-collision protocols in RFID systems.Mohammed Berhea, Chunhong Chen, Q. M. Jonathan Wu
2008ISCASAn experimental study on multi-island structures for single-electron tunneling based threshold logic.Venketeshwaran Puthucode, Chunhong Chen
2007ISCASQuasi-Static Energy Recovery Logic with Single Power-Clock Supply.Shun Li, Feng Zhou, Chunhong Chen, Hua Chen, Yipin Wu
2006ISCASPower-oriented delay budgeting for combinational circuits.Jialin Mi, Chunhong Chen, H. K. Kwan
2004ISLPEDEvaluating and optimizing power consumption of anti-collision protocols for applications in RFID systems.Feng Zhou, Chunhong Chen, Dawei Jin, Chenling Huang, Hao Min
2003ISCASA semi-Gray encoding algorithm for low-power state assignment.Chunhong Chen, Jiang Zhao, Majid Ahmadi
2002DATEPower-Manageable Scheduling Technique for Control Dominated High-Level Synthesis.Chunhong Chen, Majid Sarrafzadeh
2002ISLPEDActivity-sensitive clock tree construction for low power.Chunhong Chen, Changjun Kang, Majid Sarrafzadeh
2002VLSIDProbabilistic Analysis of Rectilinear Steiner Trees.Chunhong Chen
2001ASPDACTiming driven gate duplication in technology independent phase.Ankur Srivastava, Chunhong Chen, Majid Sarrafzadeh
2000ASPDACPower reduction by simultaneous voltage scaling and gate sizing.Chunhong Chen, Majid Sarrafzadeh
2000ICCADPotential Slack: An Effective Metric of Combinational Circuit Performance.Chunhong Chen, Xiaojian Yang, Majid Sarrafzadeh
1999ICCADProvably good algorithm for low power consumption with dual supply voltages.Chunhong Chen, Majid Sarrafzadeh
1999ICCDAn Effective Algorithm for Gate-Level Power-Delay Tradeoff Using Two Voltages.Chunhong Chen, Majid Sarrafzadeh