Skip to content

Chunsheng Liu

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

21

Venues

11

Active years

2002–2025

Best venue rank

A*

Where they publish

Papers

21 indexed papers, newest first.

YearVenueTitleAuthors
2025ICONIPMatrix Completion with Fuzzy Sampling for Network Traffic Measurement.Yifei Zhang, Nina Shu, Chunsheng Liu, Chunlai Ma, Chao Chang, Tao Wu
2023INFOCOMJoint Edge Aggregation and Association for Cost-Efficient Multi-Cell Federated Learning.Tao Wu, Yuben Qu, Chunsheng Liu, Yuqian Jing, Feiyu Wu, Haipeng Dai, Chao Dong, Jiannong Cao
2022VTSInnovative Practices Track: Test of 3D ICs & Chiplets.Sandeep Kumar Goel, Sandeep Pendharkar, Chunsheng Liu
2020ICASSPRobust Online Matrix Completion with Gaussian Mixture Model.Chunsheng Liu, Chunlei Chen, Hong Shan, Bin Wang
2020VTCRegenerative Braking Control with Gear Downshifting for Energy Efficiency and Motion Stability Improvement of an Electrical-four-wheel-drive Hybrid Vehicle.Chunming Li, Zhibin Shuai, Jiangtao Gai, Guangming Zhou, Yaoheng Li, Chunsheng Liu
2014ICNCHigh performance traffic sign recognition based on sparse representation and SVM classification.Chunsheng Liu, Faliang Chang, Zhenxue Chen
2011DATEA clock-gating based capture power droop reduction methodology for at-speed scan testing.Bo Yang, Amit Sanghani, Shantanu Sarangi, Chunsheng Liu
2011VTSDesign and implementation of a time-division multiplexing scan architecture using serializer and deserializer in GPU chips.Amit Sanghani, Bo Yang, Karthikeyan Natarajan, Chunsheng Liu
2007ISCASPower Harvesting With PZT Ceramics.Hong Chen, Chen Jia, Chun Zhang, Zhihua Wang, Chunsheng Liu
2007VTSEffects of Embedded Decompression and Compaction Architectures on Side-Channel Attack Resistance.Chunsheng Liu, Yu Huang
2006DATETest scheduling with thermal optimization for network-on-chip systems using variable-rate on-chip clocking.Chunsheng Liu, Vikram Iyengar
2006DATEReuse-based test access and integrated test scheduling for network-on-chip.Chunsheng Liu, Zach Link, Dhiraj K. Pradhan
2006VTSThermal-Aware Testing of Network-on-Chip Using Multiple-Frequency Clocking.Chunsheng Liu, Vikram Iyengar, Dhiraj K. Pradhan
2005ISNNFunctional-Link Net Based Multiobjective Fuzzy Optimization.Ping Wang, Hong-Zhong Huang, Ming Jian Zuo, Weidong Wu, Chunsheng Liu
2005VTSPower-Aware Test Scheduling in Network-on-Chip Using Variable-Rate On-Chip Clocking.Chunsheng Liu, Vikram Iyengar, Jiangfan Shi, rika F. Cota
2004ICCADAn efficient method for improving the quality of per-test fault diagnosis.Chunsheng Liu
2004ISNNNeural Network Based Fatigue Cracks Evolution.Chunsheng Liu, Weidong Wu, Daoheng Sun
2004ITCTest Scheduling for Network-on-Chip with BIST and Precedence Constraints.Chunsheng Liu, Hamid Sharif, rika F. Cota, Dhiraj K. Pradhan
2003DATEA Partition-Based Approach for Identifying Failing Scan Cells in Scan-BIST with Applications to System-on-Chip Fault Diagnosis.Chunsheng Liu, Krishnendu Chakrabarty
2003DATEEBIST: A Novel Test Generator with Built-In Fault Detection Capability.Dhiraj K. Pradhan, Chunsheng Liu, Krishnendu Chakrabarty
2002DATEAn Interval-Based Diagnosis Scheme for Identifying Failing Vectors in a Scan-BIST Environment.Chunsheng Liu, Krishnendu Chakrabarty, Michael Gssel