| 2026 | DaMoN | Let the Hardware do it: Fast Graph Query processing through FPGA-accelerated Late Materialization and Decompression. | Lei Chen, Alexander Baumstark, Andreas Becher, Daniel Ziener, Kai-Uwe Sattler |
| 2021 | FPL | Increasing Flexibility of FPGA-based CNN Accelerators with Dynamic Partial Reconfiguration. | Hasan Irmak, Daniel Ziener, Nikolaos Alachiotis |
| 2016 | FCCM | A LUT-Based Approximate Adder. | Andreas Becher, Jorge Echavarria, Daniel Ziener, Stefan Wildermann, Jrgen Teich |
| 2014 | FCCM | A Self-Adaptive SEU Mitigation System for FPGAs with an Internal Block RAM Radiation Particle Sensor. | Robrt Glein, Bernhard Schmidt, Florian Rittner, Jrgen Teich, Daniel Ziener |
| 2014 | FPGA | An automatic netlist and floorplanning approach to improve the MTTR of scrubbing techniques (abstract only). | Bernhard Schmidt, Daniel Ziener, Jrgen Teich |
| 2014 | FPL | Energy-aware SQL query acceleration through FPGA-based dynamic partial reconfiguration. | Andreas Becher, Florian Bauer, Daniel Ziener, Jrgen Teich |
| 2013 | FCCM | Acceleration of SQL Restrictions and Aggregations through FPGA-Based Dynamic Partial Reconfiguration. | Christopher Dennl, Daniel Ziener, Jrgen Teich |
| 2012 | FCCM | On-the-fly Composition of FPGA-Based SQL Query Accelerators Using a Partially Reconfigurable Module Library. | Christopher Dennl, Daniel Ziener, Jrgen Teich |
| 2011 | FPL | Stress-Aware Module Placement on Reconfigurable Devices. | Josef Angermeier, Daniel Ziener, Michael Gla, Jrgen Teich |
| 2011 | FPL | Unifying Partitioning and Placement for SAT-Based Exploration of Heterogeneous Reconfigurable SoCs. | Stefan Wildermann, Jrgen Teich, Daniel Ziener |
| 2010 | DATE | A rapid prototyping system for error-resilient multi-processor systems-on-chip. | Matthias May, Norbert Wehn, Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Daniel Ziener, Jrgen Teich |
| 2010 | FCCM | Using the Power Side Channel of FPGAs for Communication. | Daniel Ziener, Florian Baueregger, Jrgen Teich |
| 2008 | ATC | Concepts for Autonomous Control Flow Checking for Embedded CPUs. | Daniel Ziener, Jrgen Teich |
| 2006 | FPL | Identifying FPGA IP-Cores Based on Lookup Table Content Analysis. | Daniel Ziener, Stefan Assmus, Jrgen Teich |