| 2004 | ITC | An Optimized DFT and Test Pattern Generation Strategy for an Intel High Performance Microprocessor. | David M. Wu, Mike Lin, Madhukar Reddy, Talal Jaber, Anil Sabbavarapu, Larry Thatcher |
| 2003 | ITC | H-DFT: A Hybrid DFT Architecture For Low-Cost High Quality Structural Testing. | David M. Wu, Mike Lin, Subhasish Mitra, Kee Sup Kim, Anil Sabbavarapu, Talal Jaber, Pete Johnson, Dale March, Greg Parrish |
| 2002 | ITC | Trouble With Scan. | David M. Wu |
| 2000 | VTS | Cold Delay Defect Screening. | Chao-Wen Tseng, Edward J. McCluskey, Xiaoping Shao, David M. Wu |
| 1999 | ITC | DFT is all I can afford, who cares about Design for Yield or Design for Reliability! | David M. Wu |
| 1999 | ITC | "DFY and DFR are more important than DFT". | David M. Wu |
| 1992 | VTS | Multiple redundancy removal during test generation and synthesis. | David M. Wu, Robert M. Swanson |
| 1991 | DAC | Delay Test Effectiveness Evaluation of LSSD-Based VLSI Vogic Circuits. | David M. Wu, Charles E. Radke |
| 1991 | VTS | Statistical sensitivity simulation for integrating design and testing of MOSFET integrated circuits. | Waisum Wong, Juin J. Liou, Jiann-Shiun Yuan, David M. Wu |
| 1991 | VTS | An optimized delay testing technique for LSSD-based VLSI logic circuits. | David M. Wu |
| 1991 | VTS | Testing the impact of process defects on ECL power-delay performance. | Jiann-Shiun Yuan, Juin J. Liou, David M. Wu |
| 1986 | ITC | Statistical AC Test Coverage. | David M. Wu, Charles E. Radke, J. Paul Roth |
| 1984 | ITC | Improve Yield and Quality Through Testability Analysis of VLSI Circuits. | David M. Wu, Charles E. Radke, C. C. Beh |