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Dian Zhou

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

103

Venues

16

Active years

1993–2025

Best venue rank

A*

Where they publish

Papers

103 indexed papers, newest first.

YearVenueTitleAuthors
2025ACLThe Reasoning-Memorization Interplay in Language Models Is Mediated by a Single Direction.Yihuai Hong, Meng Cao, Dian Zhou, Lei Yu, Zhijing Jin
2025DACMARIO: A Superadditive Multi-Algorithm Interworking Optimization Framework for Analog Circuit Sizing.Wangzhen Li, Yuan Meng, Ruiyu Lyu, Changhao Yan, Keren Zhu, Zhaori Bi, Dian Zhou, Xuan Zeng
2025DACLook Before You Leap: A Self-Review Bayesian Optimization Method for Constrained High-Dimensional Design Space Exploration.Xuyang Zhao, Yiyang Zhao, Zheng Wu, Tianning Gao, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng
2025DATEINTO-OA: Interpretable Topology Optimization for Operational Amplifiers.Jinyi Shen, Fan Yang, Li Shang, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng
2025ICCADLCTMwalk: GPU-Accelerated Transient Thermal Simulation for Liquid-Cooled 2.5D/3D ICs via Random Walks on Circuit Networks of Modified Compact Thermal Models.Zhixuan Dong, Yonghan Luo, Yuan Meng, Changhao Yan, Zhaori Bi, Keren Zhu, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2025ICCADNSTherm: An Error-Bounded Network-Stochastic Fusion Thermal Simulator for Geometry-Adaptable Chiplets via Diffeomorphic Mapping and Neural-Guided Variance Reduction.Yuan Meng, Yuyan Wang, Zhixuan Dong, Yonghan Luo, Changhao Yan, Keren Zhu, Zhaori Bi, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2025ICCADSeeing Through Designs: Attention-Based Knowledge Transfer for Preference-Guided Microarchitecture Search.Yiyang Zhao, Xuyang Zhao, Zhaori Bi, Ming Zhu, Qiwei Zhan, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2024ASPDACA Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation : (Invited Paper).Ruiyu Lyu, Yuan Meng, Aidong Zhao, Zhaori Bi, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2024ASPDACAsynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing.Xuyang Zhao, Zhaori Bi, Changhao Yan, Fan Yang, Ye Lu, Dian Zhou, Xuan Zeng
2024DACArtisan: Automated Operational Amplifier Design via Domain-specific Large Language Model.Zihao Chen, Jiangli Huang, Yiting Liu, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng
2024DACHiMOSS: A Novel High-dimensional Multi-objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing.Tianchen Gu, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng
2024DACEVDMARL: Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design Migration.Handa Sun, Zhaori Bi, Wenning Jiang, Ye Lu, Changhao Yan, Fan Yang, Wenchuang Hu, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2024DACEfficient ILT via Multigrid-Schwartz Method.Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Dian Zhou, Xuan Zeng
2024DATECircuits Physics Constrained Predictor of Static IR Drop with Limited Data.Yuan Meng, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Wenchuang Hu, Dian Zhou, Xuan Zeng
2024ICCADRevisiting sensitivity-based analog sizing with derivative-aware Bayesian optimization and error-suppressed adjoint analysis.Ruiyu Lyu, Aidong Zhao, Yuan Meng, Keren Zhu, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng
2024UAIExploring High-dimensional Search Space via Voronoi Graph Traversing.Aidong Zhao, Xuyang Zhao, Tianchen Gu, Zhaori Bi, Xinwei Sun, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng
2023DACcVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis.Aidong Zhao, Xianan Wang, Zixiao Lin, Zhaori Bi, Xudong Li, Changhao Yan, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng
2022ASPDACA Novel and Efficient Bayesian Optimization Approach for Analog Designs with Multi-Testbench.Jingyao Zhao, Changhao Yan, Zhaori Bi, Fan Yang, Xuan Zeng, Dian Zhou
2022DACAn efficient yield optimization method for analog circuits via gaussian process classification and varying-sigma sampling.Xiaodong Wang, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng
2022ICCADA High-Precision Stochastic Solver for Steady-State Thermal Analysis with Fourier Heat Transfer Robin Boundary Conditions.Longlong Yang, Cuiyang Ding, Changhao Yan, Dian Zhou, Xuan Zeng
2022ISCASA Batch Bayesian Optimization Approach For Analog Circuit Synthesis Based On Multi-Points Selection Criterion.Xu Fu, Changhao Yan, Zhaori Bi, Fan Yang, Dian Zhou, Xuan Zeng
2021ASPDACBayesian Inference on Introduced General Region: An Efficient Parametric Yield Estimation Method for Integrated Circuits.Zhengqi Gao, Zihao Chen, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng
2021ASPDACA Robust Batch Bayesian Optimization for Analog Circuit Synthesis via Local Penalization.Jiangli Huang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2021DACNeurFill: Migrating Full-Chip CMP Simulators to Neural Networks for Model-Based Dummy Filling Synthesis.Junzhe Cai, Changhao Yan, Yuzhe Ma, Bei Yu, Dian Zhou, Xuan Zeng
2021DATEAn Efficient Yield Estimation Method for Layouts of High Dimensional and High Sigma SRAM Arrays.Yue Shen, Changhao Yan, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2021ISCASBayesian Optimization Approach for Analog Circuit Design Using Multi-Task Gaussian Process.Jiangli Huang, Shuhan Zhang, Cong Tao, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2020ASPDACBayesian Methods for the Yield Optimization of Analog and SRAM Circuits.Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng
2020DACAn Efficient and Robust Yield Optimization Method for High-dimensional SRAM Circuits.Xiaodong Wang, Tianchen Gu, Changhao Yan, Xiulong Wu, Fan Yang, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2020DACAn Efficient Asynchronous Batch Bayesian Optimization Approach for Analog Circuit Synthesis.Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng
2020DATEAn Efficient Bayesian Optimization Approach for Analog Circuit Synthesis via Sparse Gaussian Process Modeling.Biao He, Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2020ISCASAn Efficient Memory Partitioning Approach for Multi-Pattern Data Access in STT-RAM.Binbin Liu, Fan Yang, Dian Zhou, Xuan Zeng
2020ISCASA Mixed-Variable Bayesian Optimization Approach for Analog Circuit Synthesis.Jialin Lu, Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng
2020ISCASMulti-Corner Parametric Yield Estimation via Bayesian Inference on Bernoulli Distribution with Conjugate Prior.Jiahe Shi, Zhengqi Gao, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng
2020ISCASLearning Low-Rank Structured Sparsity in Recurrent Neural Networks.Weijing Wen, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng
2019DACEfficient Layout Hotspot Detection via Binarized Residual Neural Network.Yiyang Jiang, Fan Yang, Hengliang Zhu, Bei Yu, Dian Zhou, Xuan Zeng
2019DACAn Efficient Multi-fidelity Bayesian Optimization Approach for Analog Circuit Synthesis.Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, Xiangdong Hu
2019DATEAn Efficient FPGA-based Floating Random Walk Solver for Capacitance Extraction using SDAccel.Xin Wei, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng
2019DATEBayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network.Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2019ICCADEfficient Performance Trade-off Modeling for Analog Circuit based on Bayesian Neural Network.Zhengqi Gao, Jun Tao, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng
2018DACMulti-objective bayesian optimization for analog/RF circuit synthesis.Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2018DACA general graph based pessimism reduction framework for design optimization of timing closure.Fulin Peng, Changhao Yan, Chunyang Feng, Jianquan Zheng, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2018DACAn efficient Bayesian yield estimation method for high dimensional and high sigma SRAM circuits.Jinyuan Zhai, Changhao Yan, Sheng-Guo Wang, Dian Zhou
2018ICCADAn efficient data reuse strategy for multi-pattern data access.Wensong Li, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou
2018ICMLBatch Bayesian Optimization via Multi-objective Acquisition Ensemble for Automated Analog Circuit Design.Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2017ASPDACAn efficient algorithm for stencil planning and optimization in E-beam lithography.Jiabei Ge, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng
2017ASPDACNetwork flow based cut redistribution and insertion for advanced 1D layout design.Ye Zhang, Wai-Shing Luk, Fan Yang, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng
2017DACCorrelated Rare Failure Analysis via Asymptotic Probability Evaluation.Jun Tao, Handi Yu, Dian Zhou, Yangfeng Su, Xuan Zeng, Xin Li
2017DATESubgradient based multiple-starting-point algorithm for non-smooth optimization of analog circuits.Wenlong Lv, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2017DATEAn efficient leakage-aware thermal simulation approach for 3D-ICs using corrected linearized model and algebraic multigrid.Chao Yan, Hengliang Zhu, Dian Zhou, Xuan Zeng
2017ISCASEfficient SVM-based hotspot detection using spectral clustering.Fan Yang, Charles C. Chiang, Xuan Zeng, Dian Zhou
2017ISCASA grid-based detailed routing algorithm for advanced 1D process.Ye Zhang, Fan Yang, Dian Zhou, Xuan Zeng, Xiangdong Hu
2017ISCASEfficient spectral graph sparsification via Krylov-subspace based spectral perturbation analysis.Shuhan Zhang, Fan Yang, Xuan Zeng, Dian Zhou, Shun Li, Xiangdong Hu
2017ISPAA Novel N-Retry Transactional Memory Model for Multi-Thread Programming.Kun Lu, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng
2016ASPDACAn efficient trajectory-based algorithm for model order reduction of nonlinear systems via localized projection and global interpolation.Chenjie Yang, Fan Yang, Xuan Zeng, Dian Zhou
2016DACEfficient performance modeling of analog integrated circuits via kernel density based sparse regression.Chenlei Fang, Qicheng Huang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li
2016DACEfficient performance modeling via Dual-Prior Bayesian Model Fusion for analog and mixed-signal circuits.Qicheng Huang, Chenlei Fang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li
2016DATEEfficient spatial variation modeling via robust dictionary learning.Changhai Liao, Jun Tao, Xuan Zeng, Yangfeng Su, Dian Zhou, Xin Li
2016DATEEfficient multiple starting point optimization for automated analog circuit optimization via recycling simulation data.Bo Peng, Fan Yang, Changhao Yan, Xuan Zeng, Dian Zhou
2016FPGAEfficient Memory Partitioning for Parallel Data Access via Data Reuse.Jincheng Su, Fan Yang, Xuan Zeng, Dian Zhou
2016ICCADEfficient statistical analysis for correlated rare failure events via asymptotic probability approximation.Handi Yu, Jun Tao, Changhai Liao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li
2016ISCASFast compressive sensing reconstruction algorithm on FPGA using Orthogonal Matching Pursuit.Zhelun Yu, Jincheng Su, Fan Yang, Yangfeng Su, Xuan Zeng, Dian Zhou, Weiping Shi
2016ISCASHigh-speed link verification based on statistical inference.Xuan Zeng, Chenlei Fang, Qicheng Huang, Fan Yang, Dian Zhou, Wei Cai, Weiping Shi
2015ASPDACLayout decomposition co-optimization for hybrid e-beam and multiple patterning lithography.Yunfeng Yang, Wai-Shing Luk, Hai Zhou, Changhao Yan, Xuan Zeng, Dian Zhou
2011PIMRCStochastic coverage in event-driven sensor networks.Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng
2011WCNCModeling and analysis of Rayleigh fading channels using stochastic network calculus.Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng
2009ISCASIncremental Circuit Simulation Analysis for Design Modification and Verification.Tracey Y. Zhou, Dian Zhou, Xuan Zeng
2009VTCAnalytical Evaluation of Retransmission Schemes in Wireless Sensor Networks.Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng
2008ISCASFoundational-circuit-based spice simulation.Tracey Y. Zhou, Dian Zhou, Hua Zhang, Xinyue Niu
2007ASPDACStochastic Sparse-grid Collocation Algorithm (SSCA) for Periodic Steady-State Analysis of Nonlinear System with Process Variations.Jun Tao, Xuan Zeng, Wei Cai, Yangfeng Su, Dian Zhou, Charles C. Chiang
2007DATEA sparse grid based spectral stochastic collocation method for variations-aware capacitance extraction of interconnects under nanometer process technology.Hengliang Zhu, Xuan Zeng, Wei Cai, Jintao Xue, Dian Zhou
2007ISCASRLCSYN: RLC Equivalent Circuit Synthesis for Structure-Preserved Reduced-order Model of Interconnect.Fan Yang, Xuan Zeng, Yangfeng Su, Dian Zhou
2006DATETime domain model order reduction by wavelet collocation method.Xuan Zeng, Lihong Feng, Yangfeng Su, Wei Cai, Dian Zhou, Charles C. Chiang
2006ISCASA one-shot projection method for interconnects with process variations.Jun Tao, Xuan Zeng, Fan Yang, Yangfeng Su, Lihong Feng, Wei Cai, Dian Zhou, Charles C. Chiang
2005ASPDACBlock SAPOR: block Second-order Arnoldi method for Passive Order Reduction of multi-input multi-output RCS interconnect circuits.Bang Liu, Xuan Zeng, Yangfeng Su, Jun Tao, Zhaojun Bai, Charles C. Chiang, Dian Zhou
2005ASPDACA novel wavelet method for noise analysis of nonlinear circuits.Xuan Zeng, Bang Liu, Jun Tao, Charles C. Chiang, Dian Zhou
2005ISCASPower-optimal simultaneous buffer insertion/sizing and uniform wire sizing for single long wires.Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng
2005ISCASPhase noise spectra analysis for LC oscillators.Hua Zhang, Dian Zhou, Yi Hu, Ruiming Li, Jianzhong Zhang
2004ASPDACSatisfiability and integer programming as complementary tools.Ruiming Li, Dian Zhou, Donglei Du
2004ASPDACAnalog circuit behavioral modeling via wavelet collocation method with auto-companding.Jian Wang, Jun Tao, Xuan Zeng, Charles C. Chiang, Dian Zhou
2004DATEDirect Nonlinear Order Reduction with Variational Analysis.Lihong Feng, Xuan Zeng, Charles C. Chiang, Dian Zhou, Qiang Fang
2004DATESteady-State Analysis of Nonlinear Circuits Using Discrete Singular Convolution Method.Xin Zhou, Dian Zhou, Jin Liu, Ruiming Li, Xuan Zeng, Charles C. Chiang
2004ICCADSAPOR: second-order Arnoldi method for passive order reduction of RCS circuits.Yangfeng Su, Jian Wang, Xuan Zeng, Zhaojun Bai, Charles C. Chiang, Dian Zhou
2004ISCASFrequency driven repeater insertion for deep submicron.Nisar Ahmed, Mohammad H. Tehranipour, Dian Zhou, Mehrdad Nourani
2004ISCASTwo-sided projection method in variational equation model order reduction of nonlinear circuits.Lihong Feng, Xuan Zeng, Jiarong Tong, Charles C. Chiang, Dian Zhou
2004ISCASFrequency domain wavelet method with GMRES for large-scale linear circuit simulation.Jian Wang, Xuan Zeng, Wei Cai, Charles C. Chiang, Jiarong Tong, Dian Zhou
2004ISCASA closed-form phase noise solution for an ideal LC oscillator.Hua Zhang, Jianzhong Zhang, Dian Zhou, Jin Liu, Liangjun Jiang, Yan Pan
2004VLSIDAutomated Architectural Optimization of Digital FIR Filters.Ronald W. Mehler, Dian Zhou
2003ICCADPower-Optimal Simultaneous Buffer Insertion/Sizing and Wire Sizing.Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng
2003ISCASAn efficient Sylvester equation solver for time domain circuit simulation by wavelet collocation method.Xuan Zeng, Sheng Huang, Yangfeng Su, Dian Zhou
2003ISCASAn error distribution based nonlinear companding method for analog behavioral modeling via wavelet approximation.Xuan Zeng, Jun Tao, Yangfeng Su, Wenbing Chen, Dian Zhou
2002ICASSPA DSP-based turbo codec for 3G communication systems.Yingtao Jiang, Yiyan Tang, Yuke Wang, Dian Zhou
2002ISCASWavelet method for high-speed clock tree simulation.Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling
2001ICCADBehavioral Modeling of Analog Circuits by Wavelet Collocation Method.Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling
2001ISCASAutomatic clock tree design with IPs in the system.Wei Li, Dian Zhou, Haksu Kim, Xuan Zeng
2001ISCASAn efficient balanced truncation realization algorithm for interconnect model order reduction.Dian Zhou, Wei Li, Wei Cai, Nailong Guo
2000ISCASParasitic and mismatch modeling for optimal stack generation [in CMOS].Xuan Zeng, Mingyuan Li, Wenqing Zhao, Pushan Tang, Dian Zhou
1999ISCASAn automatic clock tree design system for high-speed VLSI designs: planar clock routing with the treatment of obstacles.Haksu Kim, Dian Zhou
1999ISCASA constraint-based placement refinement method for CMOS analog cell layout.Xuan Zeng, J. Guan, Wenqing Zhao, Pushan Tang, Dian Zhou
1995ISCASOptimization of VLSI Allocation.Zhongli He, Dian Zhou
1993DACPerformance-Driven Interconnect Design Based on Distributed RC Delay Model.Jason Cong, Kwok-Shing Leung, Dian Zhou
1993ICCDNeighbour State Transition Method for VLSI Optimization Problems.Dian Zhou, F. Tsui
1993ISCASPropagation Delay in RLC Interconnection Networks.D. S. Gao, Dian Zhou
1993ISCASA Two-pole Circuit Model for VLSI High-speed Interconnection.Dian Zhou, S. Su, F. Tsui, D. S. Gao, Jason Cong