| 2010 | ETS | On the cost-effectiveness of matching repositories of pre-tested wafers for wafer-to-wafer 3D chip stacking. | Jouke Verbree, Erik Jan Marinissen, Philippe Roussel, Dimitrios Velenis |
| 2010 | IOLTS | 3D integration: Circuit design, test, and reliability challenges. | Nikolaos Minas, Ingrid De Wolf, Erik Jan Marinissen, Michele Stucchi, Herman Oprins, Abdelkarim Mercha, Geert Van der Plas, Dimitrios Velenis, Pol Marchal |
| 2007 | ISCAS | Efficient Insertion of Crosstalk Shielding along On-Chip Interconnect Trees. | Boyan Semerdjiev, Dimitrios Velenis |
| 2007 | VLSID | Optimal Crosstalk Shielding Insertion along On-Chip Interconnect Trees. | Boyan Semerdjiev, Dimitrios Velenis |
| 2006 | ISCAS | Effects of crosstalk noise on H-tree clock distribution networks. | Itisha Chanodia, Dimitrios Velenis |
| 2006 | ISCAS | Power supply variation effects on timing characteristics of clocked registers. | William R. Roberts, Dimitrios Velenis |
| 2003 | DATE | Reduced Delay Uncertainty in High Performance Clock Distribution Networks. | Dimitrios Velenis, Marios C. Papaefthymiou, Eby G. Friedman |
| 2002 | Networking | SaTPEP: A TCP Performance Enhancing Proxy for Satellite Links. | Dimitrios Velenis, Dimitrios Kalogeras, Basil S. Maglaris |
| 2001 | ISCAS | A clock tree topology extraction algorithm for improving the tolerance of clock distribution networks to delay uncertainty. | Dimitrios Velenis, Eby G. Friedman, Marios C. Papaefthymiou |