Edith Beign
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
15
Venues
6
Active years
2012–2025
Best venue rank
A*
Where they publish
Papers
15 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | DAC | LLMs: A Driving Force in Next Generation Digital Design Automation. | Matheus T. Moreira, Aram H. Markosyan, Chris Cummins, Warren Hunt, Gabriel Synnaeve, Edith Beign |
| 2025 | DATE | A 3D Design Methodology for Integrated Wearable SoCs: Enabling Energy Efficiency and Enhanced Performance at Iso-Area Footprint. | Huseyin Ekin Sumbul, Arne Symons, Lita Yang, Huichu Liu, Tony F. Wu, Matheus Trevisan Moreira, Debabrata Mohapatra, Abhinav Agarwal, Kaushik Ravindran, Chris Thompson, Yuecheng Li, Edith Beign |
| 2022 | DATE | A Uniform Latency Model for DNN Accelerators with Diverse Architectures and Dataflows. | Linyan Mei, Huichu Liu, Tony F. Wu, Huseyin Ekin Sumbul, Marian Verhelst, Edith Beign |
| 2019 | ETS | Test Solutions for High Density 3D-IC Interconnects - Focus on SRAM-on-Logic Partitioning. | Imed Jani, Didier Lattard, Pascal Vivet, Jean Durupt, Sbastien Thuries, Edith Beign |
| 2018 | ETS | BISTs for post-bond test and electrical analysis of high density 3D interconnect defects. | Imed Jani, Didier Lattard, Pascal Vivet, Lucile Arnaud, Edith Beign |
| 2018 | ISCAS | Some Local Stability Properties of an Autonomous Long Short-Term Memory Neural Network Model. | Dusan M. Stipanovic, Boris Murmann, Matteo Causo, Aleksandra Lekic, Vicenc Rubies-Royo, Claire J. Tomlin, Edith Beign, Sbastien Thuries, Mykhailo Zarudniev, Suzanne Lesecq |
| 2017 | DATE | A methodology for the design of dynamic accuracy operators by runtime back bias. | Daniele Jahier Pagliari, Yves Durand, David Coriat, Anca Molnos, Edith Beign, Enrico Macii, Massimo Poncino |
| 2017 | IOLTS | In-situ Fmax/Vmin tracking for energy efficiency and reliability optimization. | Ivan Miro Panades, Edith Beign, Olivier Billoint, Yvain Thonnart |
| 2015 | ISCAS | Fine-grain DVFS and AVFS techniques for complex SoC design: An overview of architectural solutions through technology nodes. | Edith Beign, Fabien Clermidy, Didier Lattard, Ivan Miro Panades, Yvain Thonnart, Pascal Vivet |
| 2014 | DAC | Power management through DVFS and dynamic body biasing in FD-SOI circuits. | Yeter Akgul, Diego Puschini, Suzanne Lesecq, Edith Beign, Ivan Miro Panades, Pascal Benoit, Lionel Torres |
| 2014 | IECON | FIFO-level-based power management and its application to an H.264 encoder. | Ngoc-Mai Nguyen, Warody Lombardi, Edith Beign, Suzanne Lesecq, Xuan-Tu Tran |
| 2013 | DATE | Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs. | Edith Beign, Alexandre Valentian, Bastien Giraud, Olivier Thomas, Thomas Benoist, Yvain Thonnart, Serge Bernard, Guillaume Moritz, Olivier Billoint, Y. Maneglia, Philippe Flatresse, Jean-Philippe Noel, Fady Abouzeid, Bertrand Pelloux-Prayer, Anuj Grover, Sylvain Clerc, Philippe Roche, Julien Le Coz, Sylvain Engels, Robin Wilson |
| 2013 | DATE | A gate level methodology for efficient statistical leakage estimation in complex 32nm circuits. | Smriti Joshi, Anne Lombardot, Marc Belleville, Edith Beign, Stphane Girard |
| 2012 | DAC | Energy harvesting and power management for autonomous sensor nodes. | Jean-Frdric Christmann, Edith Beign, Cyril Condemine, Jrme Willemin, Christian Piguet |
| 2012 | DAC | Embedding statistical tests for on-chip dynamic voltage and temperature monitoring. | Lionel Vincent, Philippe Maurine, Suzanne Lesecq, Edith Beign |