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Eduardo Marques

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

20

Venues

14

Active years

2003–2026

Best venue rank

B

Where they publish

Papers

20 indexed papers, newest first.

YearVenueTitleAuthors
2026WorldCISTTemporal Pattern Analysis and Tourist Flow Dynamics: Leveraging High-Granularity Data from the SmartDest Platform.David Jardim, Frederica Gonalves, Eduardo Marques
2017DSDExploiting Kant and Kimura's Matrix Inversion Algorithm on FPGA.Andr B. Perina, Paulo Matias, Eduardo Marques, Vanderlei Bonato, Joo Miguel Gago Pontes de Brito Lima
2017DSDA Hardware/Software Codesign for the Chemical Reactivity of BRAMS.Carlos Alberto Oliveira De Souza, Erinaldo Pereira, Eduardo Marques
2016FPLA hardware/software codesign framework for vision-based ADAS.Leandro Andrade Martinez, Eduardo Marques
2016INDINTowards a multi-softcore FPGA approach for the HOG algorithm.Jos Arnaldo Mascagni de Holanda, Joo Manuel Paiva Cardoso, Eduardo Marques
2015FDLA special-purpose language for implementing pipelined FPGA-based accelerators.Cristiano Bacelar de Oliveira, Ricardo Menotti, Joo M. P. Cardoso, Eduardo Marques
2014CECA clustering-based approach for exploring sequences of compiler optimizations.Luiz G. A. Martins, Ricardo Nobre, Alexandre C. B. Delbem, Eduardo Marques, Joo M. P. Cardoso
2014RTCSAOperating system support to an online hardware-software co-design scheduler for heterogeneous multicore architectures.Maikon Adiles Fernandez Bueno, Jos A. M. de Holanda, Erinaldo Pereira, Eduardo Marques
2013FPLDesign Space Exploration based on multiobjective genetic algorithms and clustering-based high-level estimation.Luiz G. A. Martins, Eduardo Marques
2012FPLCombining data and computation transformations for fine-grain reconfigurable architectures.Cristiano B. Oliveira, Eduardo Marques
2012HPCCSingle Operation Multiple Data - Data Parallelism at Subroutine Level.Eduardo Marques, Herv Paulino
2012OOPSLAThe RPG DSL: a case study of language engineering using MDD for generating RPG games for mobile phones.Eduardo Marques, Valter Balegas, Bruno Fontes Barroca, Ankica Barisic, Vasco Amaral
2009FPLAutomatic generation of FPGA hardware accelerators using a domain specific language.Ricardo Menotti, Joo M. P. Cardoso, Marcio Merino Fernandes, Eduardo Marques
2009SBAC-PADLALP: A Novel Language to Program Custom FPGA-Based Architectures.Ricardo Menotti, Joo M. P. Cardoso, Marcio Merino Fernandes, Eduardo Marques
2007FPLA floating-point Extended Kalman Filter implementation for autonomous mobile robots.Vanderlei Bonato, Eduardo Marques, George A. Constantinides
2007FPLAggressive Loop Pipelining for Reconfigurable Architectures.Ricardo Menotti, Eduardo Marques, Joo M. P. Cardoso
2006SMCA Methodology to Design FPGA-based PID Controllers.Joo Miguel Gago Pontes de Brito Lima, Ricardo Menotti, Joo M. P. Cardoso, Eduardo Marques
2004ICINCOA Real Time Gesture Recognition System for Mobile Robots.Vanderlei Bonato, Adriano K. Sanches, Marcio Merino Fernandes, Joo M. P. Cardoso, Eduardo do Valle Simes, Eduardo Marques
2004WCAETeaching embedded systems with FPGAs throughout a computer science course.Vanderlei Bonato, Ricardo Menotti, Eduardo do Valle Simes, Marcio Merino Fernandes, Eduardo Marques
2003SACARCHITECT-R: A System for Reconfigurable Robots Design.R. A. Gonalves, P. A. Moraes, Joo M. P. Cardoso, Denis F. Wolf, Marcio Merino Fernandes, Roseli A. Francelin Romero, Eduardo Marques