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Edward Flanigan

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

3

Venues

3

Active years

2007–2009

Best venue rank

National

Where they publish

Papers

3 indexed papers, newest first.

YearVenueTitleAuthors
2009VTSScalable Compact Test Pattern Generation for Path Delay Faults Based on Functions.Edward Flanigan, Spyros Tragoudas, Arkan Abdulrahman
2008ITCImplicit Identification of Non-Robustly Unsensitizable Paths using Bounded Delay Model.Dheepakkumaran Jayaraman, Edward Flanigan, Spyros Tragoudas
2007VLSIDFunction-based ATPG for Path Delay Faults using the Launch-Off-Capture Scan Architecture.Edward Flanigan, Rajsekhar Adapa, Hailong Cui, Michael Laisne, Spyros Tragoudas, Tsvetomir Petrov