| 2024 | ICONIP | Importance Resides in Activations: Fast Input-Based Nonlinearity Pruning. | Baptiste Rossigneux, Vincent Lorrain, Inna Kucher, Emmanuel Casseau |
| 2022 | DaMoN | Cache management in MASCARA-FPGA: from coalescing heuristic to replacement policy. | Van Long Nguyen Huu, Laurent d'Orazio, Emmanuel Casseau, Julien Lallet |
| 2021 | VTS | Special Session: Operating Systems under test: an overview of the significance of the operating system in the resiliency of the computing continuum. | Emmanuel Casseau, Petr Dobis, Oliver Sinnen, Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt, Alessandro Savino, Stefano Di Carlo, Maurizio Rebaudengo, Alberto Bosio |
| 2021 | RTAS | Fault-Tolerant Mapping of Real-Time Parallel Applications under multiple DVFS schemes. | Minyu Cui, Angeliki Kritikakou, Lei Mo, Emmanuel Casseau |
| 2021 | SSDBM | MASCARA-FPGA cooperation model: Query Trimming through accelerators. | Van Long Nguyen Huu, Laurent d'Orazio, Emmanuel Casseau, Julien Lallet |
| 2020 | DSD | Evaluation of Fault Tolerant Online Scheduling Algorithms for CubeSats. | Petr Dobis, Emmanuel Casseau, Oliver Sinnen |
| 2018 | SCOPES | Restricted Scheduling Windows for Dynamic Fault-Tolerant Primary/Backup Approach-Based Scheduling on Embedded Systems. | Petr Dobis, Emmanuel Casseau, Oliver Sinnen |
| 2014 | ICASSP | Efficient software synthesis of dynamic dataflow programs. | Herv Yviquel, Alexandre Sanchez, Pekka Jskelinen, Jarmo Takala, Mickal Raulet, Emmanuel Casseau |
| 2014 | ISCAS | Improving high-level synthesis effectiveness through custom operator identification. | Chenglong Xiao, Emmanuel Casseau |
| 2011 | ICASSP | Exploiting reconfigurable SWP operators for multimedia applications. | Daniel Mnard, Hai-Nam Nguyen, Franois Charot, Stphane Guyetant, Jrmie Guillot, Erwan Raffin, Emmanuel Casseau |
| 2007 | FDL | Granularity Issues in Transaction Level Modelling Digital Signal Processing Applications. | Sylvain Huet, Sbastien Le Nours, Olivier Pasquier, Emmanuel Casseau |
| 2007 | ICCAD | A design flow dedicated to multi-mode architectures for DSP applications. | Cyrille Chavet, Caaliph Andriamisaina, Philippe Coussy, Emmanuel Casseau, Emmanuel Juin, Pascal Urard, Eric Martin |
| 2006 | DSD | A Computation Core for Communication Refinement of Digital Signal Processing Algorithms. | Sylvain Huet, Emmanuel Casseau, Olivier Pasquier |
| 2006 | FDL | Hardware Communication Refinement in Digital Signal Processing. | Sylvain Huet, Emmanuel Casseau, Olivier Pasquier, Sbastien Le Nours |
| 2005 | DSD | Hardware Virtual Components Compliant with Communication System Standards. | Nabil Abdelli, Pierre Bomel, Emmanuel Casseau, Anne-Marie Fouilliart, Christophe Jgo, Philippe Kajfasz, Bertrand Le Gal, Nathalie Le Heno |
| 2005 | RSP | Design Exploration and HW/SW Rapid Prototyping for Real-Time System Design. | Sylvain Huet, Emmanuel Casseau, Olivier Pasquier |
| 2004 | ISCAS | Reed-Solomon behavioral virtual component for communication systems. | Emmanuel Casseau, Bertrand Le Gal, Christophe Jgo, Nathalie Le Heno, Eric Martin |
| 1996 | DATE | High Rate Soft Output Viterbi Decoder. | Eric Lthi, Emmanuel Casseau |
| 1994 | VLSID | A Linear Systolic Array for LU Decomposition. | Emmanuel Casseau, Dominique Degrugillier |