| 2023 | ICCAD | LFPS: Learned Formal Proof Strengthening for Efficient Hardware Verification. | Minwoo Kang, Azade Nova, Eshan Singh, Geetheeka Sharron Bathini, Yuriy Viktorov |
| 2020 | DAC | A-QED Verification of Hardware Accelerators. | Eshan Singh, Florian Lonsing, Saranyu Chattopadhyay, Maxwell Strange, Peng Wei, Xiaofan Zhang, Yuan Zhou, Deming Chen, Jason Cong, Priyanka Raina, Zhiru Zhang, Clark W. Barrett, Subhasish Mitra |
| 2020 | DATE | Gap-free Processor Verification by S | Keerthikumara Devarajegowda, Mohammad Rahmani Fadiheh, Eshan Singh, Clark W. Barrett, Subhasish Mitra, Wolfgang Ecker, Dominik Stoffel, Wolfgang Kunz |
| 2019 | DATE | Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study. | Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark W. Barrett, Wolfgang Ecker, Subhasish Mitra |
| 2019 | ICCAD | Unlocking the Power of Formal Hardware Verification with CoSA and Symbolic QED: Invited Paper. | Florian Lonsing, Karthik Ganesan, Makai Mann, Srinivasa Shashank Nuthakki, Eshan Singh, Mario Srouji, Yahan Yang, Subhasish Mitra, Clark W. Barrett |
| 2017 | CAV | E-QED: Electrical Bug Localization During Post-silicon Validation Enabled by Quick Error Detection and Formal Methods. | Eshan Singh, Clark W. Barrett, Subhasish Mitra |
| 2015 | ITC | A structured approach to post-silicon validation and debug using symbolic quick error detection. | David Lin, Eshan Singh, Clark W. Barrett, Subhasish Mitra |
| 2014 | VLSID | Analytical Modeling of 3D Stacked IC Yield from Wafer to Wafer Stacking with Radial Defect Clustering. | Eshan Singh |
| 2014 | VTS | Modeling location based wafer die yield variation in estimating 3D stacked IC yield from wafer to wafer stacking. | Eshan Singh |
| 2012 | ITC | Impact of Radial defect clustering on 3D stacked IC yield from wafer to wafer stacking. | Eshan Singh |
| 2011 | VTS | Exploiting rotational symmetries for improved stacked yields in W2W 3D-SICs. | Eshan Singh |