| 2023 | EuroPar | Data Assimilation with Ocean Models: A Case Study of Reduced Precision and Machine Learning in the Gulf of Mexico. | Daniel Voss, Gary S. Tyson, Olmo Zavala-Romero, Alexandra Bozec, Ashwanth Srinivasan |
| 2020 | SIGCSE | Experience of Administering Our First S-STEM Program to Broaden Participation in Computer Science. | An-I Andy Wang, David B. Whalley, Zhenghao Zhang, Gary S. Tyson |
| 2019 | ENASE | Amniote: A User Space Interface to the Android Runtime. | Zachary Yannes, Gary S. Tyson |
| 2016 | ISPASS | Agave: A benchmark suite for exploring the complexities of the Android software stack. | Martin K. Brown, Zachary Yannes, Michael Lustig, Mazdak Sanati, Sally A. McKee, Gary S. Tyson, Steven K. Reinhardt |
| 2015 | CASES | Scheduling instruction effects for a statically pipelined processor. | B. Davis, Ryan Baird, Peter Gavin, Magnus Sjlander, Ian Finlayson, F. Rasapour, G. Cook, Gang-Ryung Uh, David B. Whalley, Gary S. Tyson |
| 2015 | HealthCom | Serious 3D gaming research for the vision impaired. | Justin B. Marshall, Gary S. Tyson, Juan Llanos, Roberto Miguel Sanchez, Francisca B. Marshall |
| 2014 | SIGCSE | A journey toward obtaining our first NSF S-STEM (scholarship) grant. | An-I Andy Wang, Gary S. Tyson, David B. Whalley, Robert van Engelen, Zhenghao Zhang |
| 2007 | CASES | Facilitating compiler optimizations through the dynamic mapping of alternate register structures. | Christopher Zimmer, Stephen Roderick Hines, Prasad A. Kulkarni, Gary S. Tyson, David B. Whalley |
| 2007 | CGO | Evaluating Heuristic Optimization Phase Order Search Algorithms. | Prasad A. Kulkarni, David B. Whalley, Gary S. Tyson |
| 2007 | MICRO | Guaranteeing Hits to Improve the Efficiency of a Small Instruction Cache. | Stephen Hines, David B. Whalley, Gary S. Tyson |
| 2006 | CASES | Adapting compilation techniques to enhance the packing of instructions into registers. | Stephen Hines, David B. Whalley, Gary S. Tyson |
| 2006 | CGO | Exhaustive Optimization Phase Order Space Exploration. | Prasad A. Kulkarni, David B. Whalley, Gary S. Tyson, Jack W. Davidson |
| 2005 | ISCA | Improving Program Efficiency by Packing Instructions into Registers. | Stephen Hines, Joshua Green, Gary S. Tyson, David B. Whalley |
| 2005 | ISPASS | PowerFITS: Reduce Dynamic and Static I-Cache Power Using Application Specific Instruction Set Synthesis. | Allen C. Cheng, Gary S. Tyson, Trevor N. Mudge |
| 2005 | MICRO | Reducing Instruction Fetch Cost by Packing Instructions into RegisterWindows. | Stephen Hines, Gary S. Tyson, David B. Whalley |
| 2004 | DAC | FITS: framework-based instruction-set tuning synthesis for embedded application specific processors. | Allen C. Cheng, Gary S. Tyson, Trevor N. Mudge |
| 2001 | HPCA | Stack Value File: Custom Microarchitecture for the Stack. | Hsien-Hsin S. Lee, Mikhail Smelyanskiy, Chris J. Newburn, Gary S. Tyson |
| 2001 | HPCA | Branch History Guided Instruction Prefetching. | Viji Srinivasan, Edward S. Davidson, Gary S. Tyson, Mark J. Charney, Thomas R. Puzak |
| 2001 | ICCD | Allocation by Conflict: A Simple Effective Multilateral Cache Management Scheme. | Edward S. Tam, Stevan A. Vlaovic, Gary S. Tyson, Edward S. Davidson |
| 2000 | CASES | Region-based caching: an energy-delay efficient memory architecture for embedded processors. | Hsien-Hsin S. Lee, Gary S. Tyson |
| 2000 | ISPASS | Instruction overhead and data locality effects in superscalar processors. | Murali Annavaram, Gary S. Tyson, Edward S. Davidson |
| 2000 | ISPASS | Quantifying instruction-level parallelism limits on an EPIC architecture. | Hsien-Hsin S. Lee, Youfeng Wu, Gary S. Tyson |
| 2000 | MICRO | Eager writeback - a technique for improving bandwidth utilization. | Hsien-Hsin S. Lee, Gary S. Tyson, Matthew K. Farrens |
| 2000 | MICRO | Improving BTB performance in the presence of DLLs. | Stevan A. Vlaovic, Edward S. Davidson, Gary S. Tyson |
| 1999 | ICS | Classifying load and store instructions for memory renaming. | Glenn Reinman, Brad Calder, Dean M. Tullsen, Gary S. Tyson, Todd M. Austin |
| 1998 | ICCD | Evaluating the performance of active cache management schemes. | Edward S. Tam, Jude A. Rivers, Vijayalakshmi Srinivasan, Gary S. Tyson, Edward S. Davidson |
| 1998 | ICS | Utilizing Reuse Information in Data Cache Management. | Jude A. Rivers, Edward S. Tam, Gary S. Tyson, Edward S. Davidson, Matthew K. Farrens |
| 1998 | MASCOTS | mlcache: A Flexible Multi-Lateral Cache Simulator. | Edward S. Tam, Jude A. Rivers, Gary S. Tyson, Edward S. Davidson |
| 1998 | MICRO | Analyzing the Working Set Characteristics of Branch Execution. | Sangwook P. Kim, Gary S. Tyson |
| 1998 | WCAE | Computer architecture instruction at the University of Michigan. | Gary S. Tyson, Steven K. Reinhardt, Trevor N. Mudge |
| 1997 | MICRO | On High-Bandwidth Data Cache Design for Multi-Issue Processors. | Jude A. Rivers, Gary S. Tyson, Edward S. Davidson, Todd M. Austin |
| 1997 | MICRO | Improving the Accuracy and Performance of Memory Communication Through Renaming. | Gary S. Tyson, Todd M. Austin |
| 1995 | MICRO | A modified approach to data cache management. | Gary S. Tyson, Matthew K. Farrens, John Matthews, Andrew R. Pleszkun |
| 1994 | ISCA | A Study of Single-Chip Processor/Cache Organizations for Large Numbers of Transistors. | Matthew K. Farrens, Gary S. Tyson, Andrew R. Pleszkun |
| 1994 | MICRO | The effects of predicated execution on branch prediction. | Gary S. Tyson |
| 1993 | MICRO | Techniques for extracting instruction level parallelism on MIMD architectures. | Gary S. Tyson, Matthew K. Farrens |
| 1992 | ISCA | A partitioned translation lookaside buffer approach to reducing address bandwith. | Matthew K. Farrens, Arvin Park, Rob Fanfelle, Pius Ng, Gary S. Tyson |
| 1992 | MICRO | Modifying VM hardware to reduce address pin requirements. | Matthew K. Farrens, Arvin Park, Gary S. Tyson |
| 1992 | MICRO | MISC: a Multiple Instruction Stream Computer. | Gary S. Tyson, Matthew K. Farrens, Andrew R. Pleszkun |