Gianluca Piccinini
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
9
Venues
9
Active years
1987–2003
Best venue rank
A*
Where they publish
Papers
9 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2003 | FPGA | Wireless sensor networks: a power-scalable motion estimation IP for hybrid video coding. | Federico Quaglio, Maurizio Martina, Fabrizio Vacca, Guido Masera, Andrea Molino, Gianluca Piccinini, Maurizio Zamboni |
| 2002 | FPL | Energy Evaluation on a Reconfigurable, Multimedia-Oriented Wireless Sensor. | Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni |
| 2002 | ICASSP | Reconfigurable DSP IP for multimedia applications. | Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni |
| 2001 | ISLPED | Synthesis of low-leakage PD-SOI circuits with body-biasing. | Mario R. Casu, Gianluca Piccinini, Guido Masera, Maurizio Zamboni |
| 2001 | VLSID | Switching Noise Analysis Framework For High Speed Logic Families. | Marco Delaurenti, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni |
| 2000 | DATE | A 50 Mbit/s Iterative Turbo-Decoder. | Fabrizio Viglione, Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni |
| 2000 | ISCAS | A high accuracy-low complexity model for CMOS delays. | Mario Roberto Casu, Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni |
| 1998 | ICCAD | Fanout optimization under a submicron transistor-level delay model. | Pasquale Cocchini, Massoud Pedram, Gianluca Piccinini, Maurizio Zamboni |
| 1987 | ISCA | An Experimental VLSI Prolog Interpreter: Preliminary Measurements and Results. | Pierluigi Civera, Franco Maddaleno, Gianluca Piccinini, Maurizio Zamboni |