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Gildas Lger

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

22

Venues

5

Active years

2002–2025

Best venue rank

B

Where they publish

Papers

22 indexed papers, newest first.

YearVenueTitleAuthors
2025IOLTSOn the Validity of SEE Simulation for Rad-Hard Analog ASICs.Valentin Gutierrez, Carlos M. Domnguez-Matas, Gildas Lger, Antonio J. Gins, Eduardo J. Peralas
2023ETSA Single-Event Latchup setup for high-precision AMS circuits.Gildas Lger, Antonio J. Gins, Eduardo J. Peralas, Valentin Gutierrez, Carlos M. Domnguez-Matas, Maria Angeles Jaln, L. Carranza
2022ETSSpecial Session on RF/5G Test.William R. Eisenstadt, Mark Roos, Devin Morris, Jos Luis Gonzlez-Jimnez, Christopery Mounet, Manuel J. Barragn, Gildas Lger, Florent Cilici, Estelle Lauga-Larroze, Salvador Mir, Sylvain Bourdel, Marc Margalef-Rovira, Issa Alaji, Haitham Ghanem, Guillaume Ducournau, Christophe Gaquire
2019DATEOn the use of causal feature selection in the context of machine-learning indirect test.Manuel J. Barragn, Gildas Lger, Florent Cilici, Estelle Lauga-Larroze, Sylvain Bourdel, Salvador Mir
2019ISCASYield Recovery of mm-Wave Power Amplifiers using Variable Decoupling Cells and One-Shot Statistical Calibration.Florent Cilici, Manuel J. Barragn, Salvador Mir, Estelle Lauga-Larroze, Sylvain Bourdel, Gildas Lger
2018IOLTSAMS-RF test quality: Assessing defect severity.Valentin Guiterrez, Antonio J. Gins, Gildas Lger
2018ISCASMixed-signal test automation: Are we there yet?Gildas Lger, Manuel J. Barragn
2017DATEOn the limits of machine learning-based test: A calibrated mixed-signal system case study.Manuel J. Barragn, Gildas Lger, Antonio J. Gins, Eduardo J. Peralas, Adoracin Rueda
2016ETSLinearity test of high-speed high-performance ADCs using a self-testable on-chip generator.Antonio J. Gins, Eduardo J. Peralas, Gildas Lger, Adoracin Rueda, Guillaume Renaud, Manuel J. Barragn, Salvador Mir
2016ETSQuestioning the reliability of Monte Carlo simulation for machine learning test validation.Gildas Lger, Manuel J. Barragn
2015DATEFeature selection for alternate test using wrappers: application to an RF LNA case study.Manuel J. Barragn, Gildas Lger
2015DATECombining adaptive alternate test and multi-site.Gildas Lger
2015ETSBoundary cost optimization for Alternate Test.Gildas Lger
2015VTSSpecial session: Hot topics: Statistical test methods.Manuel J. Barragn, Gildas Lger, Florence Azas, Ronald D. Blanton, Adit D. Singh, Stephen Sunter
2014DATESigma-delta testability for pipeline A/D converters.Antonio J. Gins, Gildas Lger
2013ETSEfficient selection of signatures for analog/RF alternate test.Manuel J. Barragan Asian, Gildas Lger
2012ETSOBT for settling error test of sampled-data systems using signal-dependent clocking.Manuel J. Barragan Asian, Gildas Lger, Jos L. Huertas
2006ETSExperimental Validation of a Fully Digital BISTfor Cascaded Sigma Delta Modulators.Gildas Lger, Adoracin Rueda
2004DATEA Digital Test for First-Order [Sigma-Delta] Modulators.Gildas Lger, Adoracin Rueda
2004DATEA Method for Parameter Extraction of Analog Sine-Wave Signals for Mixed-Signal Built-In-Self-Test Applications.Diego Vzquez, Gildas Lger, Gloria Huertas, Adoracin Rueda, Jos L. Huertas
2002ISCASPractical solutions for the application of the oscillation-based-test in analog integrated circuits.Diego Vzquez, Gloria Huertas, Gildas Lger, Adoracin Rueda, Jos L. Huertas
2002VTSPractical Solutions for the Application of the Oscillation-Based-Test: Start-Up and On-Chip Evaluation.Diego Vzquez, Gloria Huertas, Gildas Lger, Adoracin Rueda, Jos L. Huertas