| 2022 | ICDCS | Blockchain Machine: A Network-Attached Hardware Accelerator for Hyperledger Fabric. | Haris Javaid, Ji Yang, Nathania Santoso, Mohit Upadhyay, Sundararajarao Mohan, Chengchen Hu, Gordon J. Brebner |
| 2019 | FPGA | The P4->NetFPGA Workflow for Line-Rate Packet Processing. | Stephen Ibanez, Gordon J. Brebner, Nick McKeown, Noa Zilberman |
| 2019 | HOTNETS | Event-Driven Packet Processing. | Stephen Ibanez, Gianni Antichi, Gordon J. Brebner, Nick McKeown |
| 2019 | MASCOTS | Optimizing Validation Phase of Hyperledger Fabric. | Haris Javaid, Chengchen Hu, Gordon J. Brebner |
| 2012 | FPL | Optimizing packet lookup in time and space on FPGA. | Thilan Ganegedara, Viktor K. Prasanna, Gordon J. Brebner |
| 2010 | FCCM | ShapeUp: A High-Level Design Approach to Simplify Module Interconnection on FPGAs. | Christopher E. Neely, Gordon J. Brebner, Weijia Shang |
| 2010 | FPL | Flexible and Modular Support for Timing Functions in High Performance Networking Acceleration. | Christopher E. Neely, Gordon J. Brebner, Weijia Shang |
| 2006 | DATE | Memory centric thread synchronization on platform FPGAs. | Chidamber Kulkarni, Gordon J. Brebner |
| 2006 | FCCM | Systematic Characterization of Programmable Packet Processing Pipelines. | Michael Attig, Gordon J. Brebner |
| 2006 | FPGA | Building a flexible and scalable DRAM interface for networking applications on FPGAs. | Jike Chong, Chidamber Kulkarni, Gordon J. Brebner |
| 2006 | FPL | Micro-Coded Datapaths: Populating the Space Between Finite State Machine and Processor. | Chidamber Kulkarni, Gordon J. Brebner |
| 2005 | FCCM | Mutable Codesign for Embedded Protocol Processing. | Todd S. Sproull, Gordon J. Brebner, Christopher E. Neely |
| 2005 | FPL | Mutable Codesign for Embedded Protocol Processing. | Todd S. Sproull, Gordon J. Brebner, Christopher E. Neely |
| 2004 | DAC | Mapping a domain specific language to a platform FPGA. | Chidamber Kulkarni, Gordon J. Brebner, Graham Schelle |
| 2004 | FCCM | Time-Critical Software Deceleration in an FCCM. | Philip James-Roxby, Gordon J. Brebner, Dennis Bemmann |
| 2004 | FPL | Programmable Logic Has More Computational Power than Fixed Logic. | Gordon J. Brebner |
| 2004 | FPL | Multithreading in a Hyper-programmable Platform for Networked Systems. | Philip James-Roxby, Gordon J. Brebner |
| 2003 | DSD | Eccentric SoC Architectures as the Future Norm. | Gordon J. Brebner |
| 2003 | FPL | Software Decelerators. | Eric Keller, Gordon J. Brebner, Philip James-Roxby |
| 2002 | FCCM | Single-Chip Gigabit Mixed-Version IP Router on Virtex-II Pro. | Gordon J. Brebner |
| 2002 | FPL | Multithreading for Logic-Centric Systems. | Gordon J. Brebner |
| 2001 | FCCM | Circlets: Circuitry over the Internet. | Gordon J. Brebner, Irwin Kennedy |
| 2001 | FPL | Chip-Based Reconfigurable Task Management. | Gordon J. Brebner, Oliver Diessel |
| 1999 | FPL | Reconfigurable Computing in Remote and Harsh Environments. | Gordon J. Brebner, Neil W. Bergmann |
| 1998 | FCCM | Circlets: Circuits as Applets. | Gordon J. Brebner |
| 1998 | FPL | Field-Programmable Logic: Catalyst for New Computing Paradigms. | Gordon J. Brebner |
| 1998 | FPL | An Interactive Datasheet for the Xilinx XC6200. | Gordon J. Brebner |
| 1997 | FCCM | The swappable logic unit: a paradigm for virtual hardware. | Gordon J. Brebner |
| 1997 | FPL | Automatc identification of swappable logic units in XC6200 circuitry. | Gordon J. Brebner |
| 1996 | FPL | A Virtual Hardware Operating System for the Xilinx XC6200. | Gordon J. Brebner |
| 1995 | FPL | Use of Reconfigurability in Variable-Length Code Detection at Video Rates. | Gordon J. Brebner, John Gray |
| 1981 | STOC | Universal Schemes for Parallel Communication | Leslie G. Valiant, Gordon J. Brebner |