Grzegorz Borowik
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
2
Active years
2007–2014
Best venue rank
C
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2014 | ICSEng | Rule Induction Based on Logic Synthesis Methods. | Grzegorz Borowik, Andrzej Krasniewski, Tadeusz Luba |
| 2014 | ICSEng | Simulating Active Interference Cancellation in Cognitive Radio. | Zenon Chaczko, Grzegorz Borowik, Philip Hsieh |
| 2011 | ICSEng | A Tool for Trading-Off On-Line Error Detection Efficiency with Implementation Cost for Sequential Logic Implemented in FPGAs. | Grzegorz Borowik, Andrzej Krasniewski |
| 2011 | ICSEng | Reduction of Knowledge Representation Using Logic Minimization Techniques. | Grzegorz Borowik, Tadeusz Luba, Dawid Zydek |
| 2011 | ICSEng | Hardware Accelerator for Generating Primitive Polynomials over GF(3). | Grzegorz Borowik, Andrzej Paszkiewicz |
| 2009 | DDECS | Logic synthesis method for pattern matching circuits implementation in FPGA with embedded memories. | Grzegorz Borowik, Tadeusz Luba, Bogdan J. Falkowski |
| 2007 | DDECS | Cost-Efficient Synthesis for Sequential Circuits Implemented Using Embedded Memory Blocks of FPGAs. | Grzegorz Borowik, Bogdan J. Falkowski, Tadeusz Luba |