| 2006 | ASPDAC | Low-overhead design of soft-error-tolerant scan flip-flops with enhanced-scan capability. | Ashish Goel, Swarup Bhunia, Hamid Mahmoodi-Meimand, Kaushik Roy |
| 2006 | DATE | Low power synthesis of dynamic logic circuits using fine-grained clock gating. | Nilanjan Banerjee, Kaushik Roy, Hamid Mahmoodi-Meimand, Swarup Bhunia |
| 2006 | VLSID | Double-Gate SOI Devices for Low-Power and High-Performance Applications. | Kaushik Roy, Hamid Mahmoodi-Meimand, Saibal Mukhopadhyay, Hari Ananthan, Aditya Bansal, Tamer Cakici |
| 2005 | DAC | A novel synthesis approach for active leakage power reduction using dynamic supply gating. | Swarup Bhunia, Nilanjan Banerjee, Qikai Chen, Hamid Mahmoodi-Meimand, Kaushik Roy |
| 2005 | DATE | A Novel Low-overhead Delay Testing Technique for Arbitrary Two-Pattern Test Application. | Swarup Bhunia, Hamid Mahmoodi-Meimand, Arijit Raychowdhury, Kaushik Roy |
| 2005 | ICCAD | Double-gate SOI devices for low-power and high-performance applications. | Kaushik Roy, Hamid Mahmoodi-Meimand, Saibal Mukhopadhyay, Hari Ananthan, Aditya Bansal, Tamer Cakici |
| 2005 | ICCD | Novel Low-Overhead Operand Isolation Techniques for Low-Power Datapath Synthesis. | Nilanjan Banerjee, Arijit Raychowdhury, Swarup Bhunia, Hamid Mahmoodi-Meimand, Kaushik Roy |
| 2005 | ISCAS | Pre-capturing static pulsed flip-flops. | Aliakbar Ghadiri, Hamid Mahmoodi-Meimand |
| 2005 | VLSID | Dual-Edge Triggered Static Pulsed Flip-Flops. | Aliakbar Ghadiri, Hamid Mahmoodi-Meimand |
| 2005 | VTS | Modeling and Testing of SRAM for New Failure Mechanisms Due to Process Variations in Nanoscale CMOS. | Qikai Chen, Hamid Mahmoodi-Meimand, Swarup Bhunia, Kaushik Roy |
| 2004 | ICCAD | Statistical design and optimization of SRAM cell for yield enhancement. | Saibal Mukhopadhyay, Hamid Mahmoodi-Meimand, Kaushik Roy |
| 2004 | ICCD | A Novel Low-Power Scan Design Technique Using Supply Gating. | Swarup Bhunia, Hamid Mahmoodi-Meimand, Saibal Mukhopadhyay, Debjyoti Ghosh, Kaushik Roy |
| 2004 | ISCAS | Dual-edge triggered level converting flip-flops. | Hamid Mahmoodi-Meimand, Kaushik Roy |
| 2004 | ISCAS | Data-retention flip-flops for power-down applications. | Hamid Mahmoodi-Meimand, Kaushik Roy |
| 2003 | ISLPED | Energy recovery clocking scheme and flip-flops for ultra low-energy applications. | Matthew Cooke, Hamid Mahmoodi-Meimand, Kaushik Roy |
| 2002 | ISLPED | High performance and low power FIR filter design based on sharing multiplication. | Jongsun Park, Woopyo Jeong, Hunsoo Choo, Hamid Mahmoodi-Meimand, Yongtao Wang, Kaushik Roy |
| 2001 | ISCAS | Efficient power clock generation for adiabatic logic. | Hamid Mahmoodi-Meimand, Ali Afzali-Kusha |