| 2026 | ASPDAC | C3PO: Commercial-Quality Global Placement via Coherent, Concurrent Timing, Routability, and Wirelength Optimization. | Yi-Chen Lu, Hao-Hsiang Hsiao, Rongjian Liang, Wen-Hao Liu, Haoxing Ren |
| 2026 | ASPDAC | Differentiable Tier Assignment for Timing and Congestion-Aware Routing in 3D ICs. | Yuan-Hsiang Lu, Hao-Hsiang Hsiao, Yi-Chen Lu, Haoxing Ren, Sung Kyu Lim |
| 2026 | ASPDAC | Code, Not Canvas: Multi-Agent Layout Generation Beyond Vision Models. | Haoyu Yang, Haoxing Ren |
| 2026 | VTS | FVRuleLearner: Operator-Level Reasoning Tree (Op-Tree)-Based Rules Learning for Formal Verification. | Lily Jiaxin Wan, Chia-Tung Ho, Yunsheng Bai, Cunxi Yu, Deming Chen, Haoxing Ren |
| 2025 | AAAI | Intelligent OPC Engineer Assistant for Semiconductor Manufacturing. | Guojin Chen, Haoyu Yang, Bei Yu, Haoxing Ren |
| 2025 | AAAI | VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool. | Chia-Tung Ho, Haoxing Ren, Brucek Khailany |
| 2025 | DAC | ChipAlign: Instruction Alignment in Large Language Models for Chip Design via Geodesic Interpolation. | Chenhui Deng, Yunsheng Bai, Haoxing Ren |
| 2025 | DAC | GEM: GPU-Accelerated Emulator-Inspired RTL Simulation. | Zizheng Guo, Yanqing Zhang, Runsheng Wang, Yibo Lin, Haoxing Ren |
| 2025 | DAC | DCO-3D: Differentiable Congestion Optimization in 3D ICs. | Hao-Hsiang Hsiao, Yi-Chen Lu, Pruek Vanna-Iampikul, Anthony Agnesina, Rongjian Liang, Yuan-Hsiang Lu, Haoxing Ren, Sung Kyu Lim |
| 2025 | DAC | Reinforcement Learning-Driven Window Selection for Enhanced Window-Based Rip-up and Reroute in Chip Detailed Routing. | Yu-Chan Keng, Yu-Chun Pai, Wen-Hao Liu, Haoxing Ren, Danny Liu, Rongjian Liang, Mark Ho, Anthony Agnesina, Yih-Lang Li |
| 2025 | DAC | INSTA: An Ultra-Fast, Differentiable, Statistical Static Timing Analysis Engine for Industrial Physical Design Applications. | Yi-Chen Lu, Zhizheng Guo, Kishor Kunal, Rongjian Liang, Haoxing Ren |
| 2025 | DATE | BOSON | Pingchuan Ma, Zhengqi Gao, Amir Begovic, Meng Zhang, Haoyu Yang, Haoxing Ren, Z. Rena Huang, Duane S. Boning, Jiaqi Gu |
| 2025 | DATE | FVEval: Understanding Language Model Capabilities in Formal Verification of Digital Hardware. | Minwoo Kang, Mingjie Liu, Ghaith Bany Hamad, Syed M. Suhaib, Haoxing Ren |
| 2025 | DATE | ChipVQA: Benchmarking Visual Language Models for Chip Design. | Haoyu Yang, Qijing Huang, Nathaniel Ross Pinckney, Walker J. Turner, Wenfei Zhou, Yanqing Zhang, Chia-Tung Ho, Chen-Chia Chang, Haoxing Ren |
| 2025 | EuroPar | SimPart: A Simple Yet Effective Replication-Aided Partitioning Algorithm for Logic Simulation on GPU. | Yi-Hua Chung, Shui Jiang, Wan-Luan Lee, Yanqing Zhang, Haoxing Ren, Tsung-Yi Ho, Tsung-Wei Huang |
| 2025 | ICCAD | BUFFALO: PPA-Configurable, LLM-based Buffer Tree Generation via Group Relative Policy Optimization. | Hao-Hsiang Hsiao, Yi-Chen Lu, Sung Kyu Lim, Haoxing Ren |
| 2025 | ICCAD | Invited Paper: LLM-Enhanced GPU-Optimized Physical Design at Scale. | Yi-Chen Lu, Hao-Hsiang Hsiao, Haoxing Ren |
| 2025 | ICCAD | Invited Paper: 2025 ICCAD CAD Contest Problem C: Incremental Placement Optimization Beyond Detailed Placement: Simultaneous Gate Sizing, Buffering, and Cell Relocation. | Yi-Chen Lu, Rongjian Liang, Wen-Hao Liu, Haoxing Ren |
| 2025 | ICCAD | Leveraging GPU for Better Detailed Placement Quality. | Chen-Han Lu, Wen-Hao Liu, Haoxing Ren, Ting-Chi Wang |
| 2025 | ICCAD | LLM4Verilog: Building Large-Scale, High-Quality Data Infrastructure for Verilog Code Generation via Community Efforts. | Zhongzhi Yu, Chaojian Li, Yongan Zhang, Mingjie Liu, Nathaniel Ross Pinckney, Wenfei Zhou, Rongjian Liang, Haoyu Yang, Haoxing Ren, Yingyan Celine Lin |
| 2025 | ICCAD | Apollo: Automated Routing-Informed Placement for Large-Scale Photonic Integrated Circuits. | Hongjian Zhou, Haoyu Yang, Nicholas Gangi, Zhaoran Rena Huang, Haoxing Ren, Jiaqi Gu |
| 2025 | ICLR | CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repair. | Mingjie Liu, Yun-Da Tsai, Wenfei Zhou, Haoxing Ren |
| 2024 | DAC | DGR: Differentiable Global Router. | Wei Li, Rongjian Liang, Anthony Agnesina, Haoyu Yang, Chia-Tung Ho, Anand Rajaram, Haoxing Ren |
| 2024 | DAC | RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Model. | Yunda Tsai, Mingjie Liu, Haoxing Ren |
| 2024 | DATE | BoolGebra: Attributed Graph-Learning for Boolean Algebraic Manipulation. | Yingjie Li, Anthony Agnesina, Yanqing Zhang, Haoxing Ren, Cunxi Yu |
| 2024 | ICCAD | GL0AM: GPU Logic Simulation Using 0-Delay and Re-simulation Acceleration Method. | Yanqing Zhang, Haoxing Ren, Brucek Khailany |
| 2024 | ICCAD | 2024 ICCAD CAD Contest Problem C: Scalable Logic Gate Sizing Using ML Techniques and GPU Acceleration. | Bing-Yue Wu, Rongjian Liang, Geraldo Pradipta, Anthony Agnesina, Haoxing Ren, Vidya A. Chhabria |
| 2024 | ICCAD | Invited Paper: LLM4HWDesign Contest: Constructing a Comprehensive Dataset for LLM-Assisted Hardware Code Generation with Community Efforts. | Zhongzhi Yu, Chaojian Li, Yongan Zhang, Mingjie Liu, Nathaniel Ross Pinckney, Wenfei Zhou, Haoyu Yang, Rongjian Liang, Haoxing Ren, Yingyan Celine Lin |
| 2024 | ICML | ILILT: Implicit Learning of Inverse Lithography Technologies. | Haoyu Yang, Haoxing Ren |
| 2024 | VTS | OpenROAD and CircuitOps: Infrastructure for ML EDA Research and Education. | Vidya A. Chhabria, Wenjing Jiang, Andrew B. Kahng, Rongjian Liang, Haoxing Ren, Sachin S. Sapatnekar, Bing-Yue Wu |
| 2024 | VTS | Domain-Adapted LLMs for VLSI Design and Verification: A Case Study on Formal Verification. | Mingjie Liu, Minwoo Kang, Ghaith Bany Hamad, Syed Suhaib, Haoxing Ren |
| 2023 | ASPDAC | BufFormer: A Generative ML Framework for Scalable Buffering. | Rongjian Liang, Siddhartha Nath, Anand Rajaram, Jiang Hu, Haoxing Ren |
| 2023 | ASPDAC | Enabling Scalable AI Computational Lithography with Physics-Inspired Models. | Haoyu Yang, Haoxing Ren |
| 2023 | DAC | GenFuzz: GPU-accelerated Hardware Fuzzing using Genetic Algorithm with Multiple Inputs. | Dian-Lun Lin, Yanqing Zhang, Haoxing Ren, Brucek Khailany, Shih-Hsin Wang, Tsung-Wei Huang |
| 2023 | ICCAD | Invited Paper: CircuitOps: An ML Infrastructure Enabling Generative AI for VLSI Circuit Optimization. | Rongjian Liang, Anthony Agnesina, Geraldo Pradipta, Vidya A. Chhabria, Haoxing Ren |
| 2023 | ICCAD | Invited Paper: VerilogEval: Evaluating Large Language Models for Verilog Code Generation. | Mingjie Liu, Nathaniel Ross Pinckney, Brucek Khailany, Haoxing Ren |
| 2023 | ICCAD | An Adversarial Active Sampling-Based Data Augmentation Framework for AI-Assisted Lithography Modeling. | Mingjie Liu, Haoyu Yang, Brucek Khailany, Haoxing Ren |
| 2022 | DAC | Generative self-supervised learning for gate sizing: invited. | Siddhartha Nath, Geraldo Pradipta, Corey Hu, Tian Yang, Brucek Khailany, Haoxing Ren |
| 2022 | DAC | Generic lithography modeling with dual-band optics-inspired neural networks. | Haoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Mark Kilgard, Anima Anandkumar, Brucek Khailany, Vivek Singh, Haoxing Ren |
| 2022 | DAC | GATSPI: GPU accelerated gate-level simulation for power improvement. | Yanqing Zhang, Haoxing Ren, Akshay Sridharan, Brucek Khailany |
| 2022 | DATE | Routability-Aware Placement for Advanced FinFET Mixed-Signal Circuits using Satisfiability Modulo Theories. | Hao Chen, Walker J. Turner, David Z. Pan, Haoxing Ren |
| 2022 | ICCAD | TAG: Learning Circuit Spatial Embedding from Layouts. | Keren Zhu, Hao Chen, Walker J. Turner, George F. Kokai, Po-Hsuan Wei, David Z. Pan, Haoxing Ren |
| 2022 | ICCAD | TransSizer: A Novel Transformer-Based Fast Gate Sizer. | Siddhartha Nath, Geraldo Pradipta, Corey Hu, Tian Yang, Brucek Khailany, Haoxing Ren |
| 2022 | ICCAD | Why are Graph Neural Networks Effective for EDA Problems?: (Invited Paper). | Haoxing Ren, Siddhartha Nath, Yanqing Zhang, Hao Chen, Mingjie Liu |
| 2022 | ICPP | From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch Stimulus. | Dian-Lun Lin, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Tsung-Wei Huang |
| 2021 | ASPDAC | Standard Cell Routing with Reinforcement Learning and Genetic Algorithm in Advanced Technology Nodes. | Haoxing Ren, Matthew Fojtik |
| 2021 | DAC | Invited- NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning. | Haoxing Ren, Matthew Fojtik |
| 2021 | DATE | MAVIREC: ML-Aided Vectored IR-Drop Estimation and Classification. | Vidya A. Chhabria, Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany, Sachin S. Sapatnekar |
| 2021 | DATE | Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization. | Mingjie Liu, Walker J. Turner, George F. Kokai, Brucek Khailany, David Z. Pan, Haoxing Ren |
| 2021 | ICCAD | 2021 ICCAD CAD Contest Problem C: GPU Accelerated Logic Rewriting. | Ghasem Pasandi, Sreedhar Pratty, David Brown, Yanqing Zhang, Haoxing Ren, Brucek Khailany |
| 2021 | ICCAD | Optimizing VLSI Implementation with Reinforcement Learning - ICCAD Special Session Paper. | Haoxing Ren, Saad Godil, Brucek Khailany, Robert Kirby, Haiguang Liao, Siddhartha Nath, Jonathan Raiman, Rajarshi Roy |
| 2020 | ASPDAC | FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning. | Zhiyao Xie, Guan-Qi Fang, Yu-Hung Huang, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Shao-Yun Fang, Jiang Hu, Yiran Chen, Erick Carvajal Barboza |
| 2020 | ASPDAC | PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network. | Zhiyao Xie, Haoxing Ren, Brucek Khailany, Ye Sheng, Santosh Santosh, Jiang Hu, Yiran Chen |
| 2020 | DAC | ParaGraph: Layout Parasitics and Device Parameter Prediction using Graph Neural Networks. | Haoxing Ren, George F. Kokai, Walker J. Turner, Ting-Sheng Ku |
| 2020 | DAC | GRANNITE: Graph Neural Network Inference for Transferable Power Estimation. | Yanqing Zhang, Haoxing Ren, Brucek Khailany |
| 2020 | ICCAD | Opportunities for RTL and Gate Level Simulation using GPUs (Invited Talk). | Yanqing Zhang, Haoxing Ren, Brucek Khailany |
| 2020 | ICCAD | Problem C: GPU Accelerated Logic Re-simulation : (Invited Talk). | Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany |
| 2019 | DAC | DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. | Yibo Lin, Shounak Dhar, Wuxi Li, Haoxing Ren, Brucek Khailany, David Z. Pan |
| 2019 | DAC | High Performance Graph Convolutional Networks with Applications in Testability Analysis. | Yuzhe Ma, Haoxing Ren, Brucek Khailany, Harbinder Sikka, Lijuan Luo, Karthikeyan Natarajan, Bei Yu |
| 2019 | DAC | PRIMAL: Power Inference using Machine Learning. | Yuan Zhou, Haoxing Ren, Yanqing Zhang, Ben Keller, Brucek Khailany, Zhiru Zhang |
| 2019 | DATE | Routability-Driven Macro Placement with Embedded CNN-Based Prediction Model. | Yu-Hung Huang, Zhiyao Xie, Guan-Qi Fang, Tao-Chun Yu, Haoxing Ren, Shao-Yun Fang, Yiran Chen, Jiang Hu |
| 2018 | ICCAD | RouteNet: routability prediction for mixed-size designs using convolutional neural network. | Zhiyao Xie, Yu-Hung Huang, Guan-Qi Fang, Haoxing Ren, Shao-Yun Fang, Yiran Chen, Jiang Hu |
| 2013 | DATE | Intuitive ECO synthesis for high performance circuits. | Haoxing Ren, Ruchir Puri, Lakshmi N. Reddy, Smita Krishnaswamy, Cindy Washburn, Joel Earl, Joachim Keinert |
| 2013 | ICCAD | LatchPlanner: latch placement algorithm for datapath-oriented high-performance VLSI designs. | Minsik Cho, Hua Xiang, Haoxing Ren, Matthew M. Ziegler, Ruchir Puri |
| 2010 | DAC | History-based VLSI legalization using network flow. | Minsik Cho, Haoxing Ren, Hua Xiang, Ruchir Puri |
| 2009 | ICCAD | DeltaSyn: An efficient logic difference optimizer for ECO synthesis. | Smita Krishnaswamy, Haoxing Ren, Nilesh Modi, Ruchir Puri |
| 2009 | ITC | Low cost test point insertion without using extra registers for high performance design. | Haoxing Ren, Mary P. Kusko, Victor N. Kravets, Rona Yaari |
| 2007 | ASPDAC | Hippocrates: First-Do-No-Harm Detailed Placement. | Haoxing Ren, David Z. Pan, Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia |
| 2007 | DAC | RQL: Global Placement via Relaxed Quadratic Spreading and Linearization. | Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alpert, Paul Villarrubia, Haoxing Ren, Chris C. N. Chu |
| 2005 | DAC | Diffusion-based placement migration. | Haoxing Ren, David Zhigang Pan, Charles J. Alpert, Paul Villarrubia |
| 2005 | ICCAD | Computational geometry based placement migration. | Tao Luo, Haoxing Ren, Charles J. Alpert, David Zhigang Pan |
| 2004 | ICCAD | True crosstalk aware incremental placement with noise map. | Haoxing Ren, David Zhigang Pan, Paul Villarrubia |