Hirotaka Tamura
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
5
Active years
2013–2022
Best venue rank
A
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2022 | FPGA | MAQO: A Scalable Many-Core Annealer for Quadratic Optimization on a Stratix 10 FPGA. | Mohammad Bagherbeik, Wentao Xu, Seyed Farzad Mousavi, Kouichi Kanda, Hirotaka Tamura, Ali Sheikholeslami |
| 2020 | ASPDAC | Digital Annealer for High-Speed Solving of Combinatorial optimization Problems and Its Applications. | Satoshi Matsubara, Motomu Takatsu, Toshiyuki Miyazawa, Takayuki Shibasaki, Yasuhiro Watanabe, Kazuya Takemoto, Hirotaka Tamura |
| 2020 | PPSN | A Permutational Boltzmann Machine with Parallel Tempering for Solving Combinatorial Optimization Problems. | Mohammad Bagherbeik, Parastoo Ashtari, Seyed Farzad Mousavi, Kouichi Kanda, Hirotaka Tamura, Ali Sheikholeslami |
| 2017 | CISIS | Ising-Model Optimizer with Parallel-Trial Bit-Sieve Engine. | Satoshi Matsubara, Hirotaka Tamura, Motomu Takatsu, Danny Yoo, Behraz Vatankhahghadim, Hironobu Yamasaki, Toshiyuki Miyazawa, Sanroku Tsukamoto, Yasuhiro Watanabe, Kazuya Takemoto, Ali Sheikholeslami |
| 2014 | FPGA | Optimizing effective interconnect capacitance for FPGA power reduction. | Safeen Huda, Jason Helge Anderson, Hirotaka Tamura |
| 2013 | FPL | Charge recycling for power reduction in FPGA interconnect. | Safeen Huda, Jason Helge Anderson, Hirotaka Tamura |