| 2017 | ISCAS | A novel clock-pulse-width calibration technique for charge redistribution DACs. | Hugo Cruz, Hong-Yi Huang, Ching-Hsing Luo, Lih-Yih Chiou, Shuenn-Yuh Lee |
| 2016 | DDECS | Gm-C filter with automatic calibration scheme. | Hong-Yi Huang, Kun-Yuan Chen, Jiahao Xie, Ming-Ta Lee, Hao-Chiao Hong, Kuo-Hsing Cheng |
| 2016 | DDECS | Low-voltage indoor energy harvesting using photovoltaic cell. | Hong-Yi Huang, Shao-Zu Yen, Jhen-Hong Chen, Hao-Chiao Hong, Kuo-Hsing Cheng |
| 2016 | DDECS | A chaotically injected timing technique for ring-based oscillators. | Yo-Hao Tu, Kuo-Hsing Cheng, Wei-Ren Wang, Jen-Chieh Liu, Hong-Yi Huang |
| 2015 | DDECS | PVT Insensitive High-Resolution Time to Digital Converter for Intraocular Pressure Sensing. | Hong-Yi Huang, Jen-Chieh Liu, Pei-Ying Lee, Kun-Yuan Chen, Jin-Sheng Chen, Kuo-Hsing Cheng, Tzuen-Hsi Huang, Ching-Hsing Luo, Jin-Chern Chiou |
| 2015 | DDECS | Triangular Modulation Using Switched-Capacitor Scheme for Spread-Spectrum Clocking. | Hong-Yi Huang, Gene Fe P. Palencia, Da-Kai Chen, Wei-Hsuan Huang |
| 2015 | DDECS | A Synchronous Mirror Delay with Duty-Cycle Tunable Technology. | Yo-Hao Tu, Kuo-Hsing Cheng, Yian-An Lin, Hong-Yi Huang |
| 2014 | DDECS | A 64-MHz∼640-MHz 64-phase clock generator. | Hong-Yi Huang, Jen-Chieh Liu, Shi-Jia Sun, Cheng-Hao Fu, Kuo-Hsing Cheng |
| 2014 | DDECS | A low supply voltage synchronous mirror delay with quadrature phase output. | Yo-Hao Tu, Kuo-Hsing Cheng, Chih-Hsun Hsu, Hong-Yi Huang |
| 2014 | ISCAS | Analysis and design of a 1.3-mW current-reuse RF front-end for the MICS band. | Hugo Cruz, Hong-Yi Huang, Shuenn-Yuh Lee, Ching-Hsing Luo |
| 2014 | ISCAS | A radio-controlled receiver for clocks/watches and alarm applications. | Jen-Chieh Liu, Huan-Ke Chiu, Jia-Hung Peng, Yuan-Hua Chu, Hong-Yi Huang |
| 2013 | DDECS | External capacitorless low dropout linear regulator using cascode structure. | Hong-Yi Huang, Cheng-Yu Chen, Kuo-Hsing Cheng |
| 2013 | DDECS | Indoor energy harvesting using photovoltaic cell for battery recharging. | Hong-Yi Huang, Chinet Otic Mocorro, Julyver Pinaso, Kuo-Hsing Cheng |
| 2013 | DDECS | A low jitter delay-locked-loop applied for DDR4. | Yo-Hao Tu, Kuo-Hsing Cheng, Hsiang-Yun Wei, Hong-Yi Huang |
| 2012 | DDECS | A low voltage sigma delta modulator for temperature sensor. | Yi-Hsiang Juan, Ching-Hsing Luo, Hong-Yi Huang |
| 2011 | ISCAS | All digital phase-locked loop using active inductor oscillator and novel locking algorithm. | Tzu-Chi Huang, Hong-Yi Huang, Jen-Chieh Liu, Kuo-Hsing Cheng, Ching-Hsing Luo |
| 2010 | DDECS | A time-to-digital converter using multi-phase-sampling and time amplifier for all digital phase-locked loop. | Kuo-Hsing Cheng, Chang-Chien Hu, Jen-Chieh Liu, Hong-Yi Huang |
| 2009 | DDECS | Analysis and optimization of ring oscillator using sub-feedback scheme. | Hong-Yi Huang, Fu-Chien Tsai |
| 2009 | DDECS | 0.5V 160-MHz 260uW all digital phase-locked loop. | Jen-Chieh Liu, Hong-Yi Huang, Wei-Bin Yang, Kuo-Hsing Cheng |
| 2008 | ISCAS | Dual band LNA/mixer using conjugate matching for implantable biotelemetry. | Wei-Chen Huang, Chen-Ming Hsu, Chien-Ming Lee, Hong-Yi Huang, Ching-Hsing Luo |
| 2008 | ISCAS | Low-power 50% duty cycle corrector. | Hong-Yi Huang, Chia-Ming Liang, Shi-Jia Sun |
| 2007 | ISCAS | A New Cycle-Time-to-Digital Converter With Two Level Conversion Scheme. | Hong-Yi Huang, Sheng-Da Wu, Yi-Jui Tsai |
| 2006 | ISCAS | 1-99% input duty 50% output duty cycle corrector. | Hong-Yi Huang, Chia-Ming Liang, Wei-Ming Chiu |
| 2006 | ISCAS | High-gain and high-bandwidth rail-to-rail operational amplifier with slew rate boost circuit. | Hong-Yi Huang, Bo-Ruei Wang, Jen-Chieh Liu |
| 2006 | ISCAS | On-chip bidirectional transceiver. | Hong-Yi Huang, Ching-Chieh Wu, Sen-Da Wu |
| 2005 | ISCAS | A 64-MHz~1920-MHz programmable spread-spectrum clock generator. | Hong-Yi Huang, Sheng-Fen Ho, Li-Wei Huang |
| 2004 | ISCAS | A low-voltage CMOS rail-to-rail operational amplifier using double p-channel differential input pairs. | Chun-Jen Huang, Hong-Yi Huang |
| 2003 | ISCAS | A high-bandwidth wireless infrared receiver with feedforward offset extractor. | Chin-Shan Hsieh, Hong-Yi Huang, Jeng-Dang Juan, Ruey-Nan Yeh |
| 2002 | ISCAS | Input isolated sense amplifiers. | Hong-Yi Huang, Shih-Lun Chen |
| 2002 | ISCAS | CMOS bulk input technique. | Hong-Yi Huang, Jing-Fu Lin |
| 2002 | ISCAS | Low-power 2P2N SRAM with column hidden refresh. | Hong-Yi Huang, Hsuan-Yi Su |
| 2001 | ISCAS | High-speed CMOS logic circuits in capacitor coupling technique. | Hong-Yi Huang, Teng-Neng Wang |
| 1995 | ISCAS | Low-Voltage Low-Power CMOS True-Single-Phase Clocking Scheme with Locally Asynchronous Logic Circuits. | Hong-Yi Huang, Jinn-Shyan Wang, Yuan-Hua Chu, Tain-Shun Wu, Kuo-Hsing Cheng, Chung-Yu Wu |
| 1994 | ISCAS | New CMOS Differential Logic Circuits for True-Single-Phase Pipelined Systems. | Hong-Yi Huang, Chung-Yu Wu |
| 1993 | ISCAS | Redundant Algebra and Integrated Circuit Implementation of Ternary Logic and Their Applications. | Hong-Yi Huang, Chung-Yu Wu |