A time-to-digital converter using multi-phase-sampling and time amplifier for all digital phase-locked loop.
Kuo-Hsing Cheng, Chang-Chien Hu, Jen-Chieh Liu, Hong-Yi Huang
Browse the full DDECS paper archive.
Kuo-Hsing Cheng, Chang-Chien Hu, Jen-Chieh Liu, Hong-Yi Huang
Browse the full DDECS paper archive.