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Hortensia Mecha

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

6

Venues

5

Active years

1997–2016

Best venue rank

A

Where they publish

Papers

6 indexed papers, newest first.

YearVenueTitleAuthors
2016DATERadiation-hardened DSP configurations for implementing arithmetic functions on FPGA.Marcos Snchez-lez, Inmaculada Pardines, Felipe Serrano, Hortensia Mecha
2006ASPDACTask placement heuristic based on 3D-adjacency and look-ahead in reconfigurable systems.Jess Tabero, Julio Septin, Hortensia Mecha, Daniel Mozos
2006DSDPartition Based Dynamic 2D HW Multitasking Management.Sara Romn Navarro, Hortensia Mecha, Daniel Mozos, Julio Septin
2004FPLA Low Fragmentation Heuristic for Task Placement in 2D RTR HW Management.Jess Tabero, Julio Septin, Hortensia Mecha, Daniel Mozos
1998DATEA Macroscopic Time and Cost Estimation Model Allowing Task Parallelism and Hardware Sharing for the Codesign Partitioning Process.Juan Antonio Maestro, Daniel Mozos, Hortensia Mecha
1997VLSIDInterconnection Delay and Clock Cycle Selection in High Level Synthesis.Hortensia Mecha, Milagros Fernndez