Hosahalli R. Srinivas
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
4
Active years
1991–1998
Best venue rank
C
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1998 | VLSID | VLSI Implementation of a 300-MHz 0.35 um CMOS 32-bit Auto-Reloadable Binary Synchronous Counter with Optimal Test Overhead Delay. | S. K. Misra, R. K. Kolagotla, Hosahalli R. Srinivas, J. C. Mo, Marc S. Diamondstein |
| 1997 | ICASSP | Half-rate GSM vocoder implementation on a dual mac digital signal processor. | Mohit K. Prasad, Paul D'Arcy, Arup Gupta, Marc S. Diamondstein, Hosahalli R. Srinivas |
| 1995 | ICCD | A floating point radix 2 shared division/square root chip. | Hosahalli R. Srinivas, Keshab K. Parhi |
| 1995 | VLSID | A 16-bit x 16-bit 1.2 μ CMOS multiplier with low latency vector merging. | W. Amendola Jr., Hosahalli R. Srinivas, Keshab K. Parhi |
| 1994 | ISCAS | A Fast Radix-4 Division Algorithm. | Hosahalli R. Srinivas, Keshab K. Parhi |
| 1993 | ICCD | A C-Testable Carry-Free Divider. | Hosahalli R. Srinivas, Bapiraju Vinnakota, Keshab K. Parhi |
| 1991 | ICCD | High-Speed VLSI Arithmetic Processor Architectures Using Hybrid Number Representation. | Hosahalli R. Srinivas, Keshab K. Parhi |