Hsing-Chung Liang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
4
Active years
1998–2021
Best venue rank
B
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2021 | ETS | Automatic Inspection for Wafer Defect Pattern Recognition with Unsupervised Clustering. | Katherine Shu-Min Li, Leon Li-Yang Chen, Ken Chau-Cheung Cheng, Peter Yi-Yu Liao, Sying-Jyan Wang, Andrew Yi-Ann Huang, Nova Cheng-Yen Tsai, Leon Chou, Gus Chang-Hung Han, Jwu E. Chen, Hsing-Chung Liang, Chun-Lung Hsu |
| 2021 | ETS | GPU-based ATPG System by Scaling Memory Usage and Reducing Data Transfer. | Hua-Ren Li, Hsing-Chung Liang |
| 2021 | ITC | Semi-Supervised Framework for Wafer Defect Pattern Recognition with Enhanced Labeling. | Leon Li-Yang Chen, Katherine Shu-Min Li, Xu-Hao Jiang, Sying-Jyan Wang, Andrew Yi-Ann Huang, Jwu E. Chen, Hsing-Chung Liang, Chun-Lung Hsu |
| 2020 | DATE | Wafer-Level Test Path Pattern Recognition and Test Characteristics for Test-Induced Defect Diagnosis. | Ken Chau-Cheung Cheng, Katherine Shu-Min Li, Andrew Yi-Ann Huang, Ji-Wei Li, Leon Li-Yang Chen, Nova Cheng-Yen Tsai, Sying-Jyan Wang, Chen-Shiun Lee, Leon Chou, Peter Yi-Yu Liao, Hsing-Chung Liang, Jwu E. Chen |
| 1998 | VTS | Partial Reset and Scan for Flip-Flops Based on States Requirement for Test Generation. | Hsing-Chung Liang, Chung-Len Lee, Jwu E. Chen |