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Indradeep Ghosh

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

27

Venues

15

Active years

1994–2022

Best venue rank

A*

Where they publish

Papers

27 indexed papers, newest first.

YearVenueTitleAuthors
2022ICCSPartitioning Dense Graphs with Hardware Accelerators.Xiaoyuan Liu, Hayato Ushijima-Mwesigwa, Indradeep Ghosh, Ilya Safro
2022ICDMTowards Practical Explainability with Cluster Descriptors.Xiaoyuan Liu, Ilya Tyagin, Hayato Ushijima-Mwesigwa, Indradeep Ghosh, Ilya Safro
2021IDAIsing-Based Louvain Method: Clustering Large Graphs with Specialized Hardware.Pouya Rezazadeh Kalehbasti, Hayato Ushijima-Mwesigwa, Avradip Mandal, Indradeep Ghosh
2016ISSTAFSX: fine-grained incremental unit test generation for C/C++ programs.Hiroaki Yoshida, Susumu Tokumoto, Mukul R. Prasad, Indradeep Ghosh, Tadahiro Uehara
2015ICSTGenerating Succinct Test Cases Using Don't Care Analysis.Cuong Nguyen, Hiroaki Yoshida, Mukul R. Prasad, Indradeep Ghosh, Koushik Sen
2013ICSEJST: an automatic test generation tool for industrial Java applications with strings.Indradeep Ghosh, Nastaran Shafiei, Guodong Li, Wei-Fan Chiang
2012PPoPPGKLEE: concolic verification and test generation for GPUs.Guodong Li, Peng Li, Geoffrey Sawaya, Ganesh Gopalakrishnan, Indradeep Ghosh, Sreeranga P. Rajan
2011CAVKLOVER: A Symbolic Execution and Automatic Test Generation Tool for C++ Programs.Guodong Li, Indradeep Ghosh, Sreeranga P. Rajan
2009ICSEWEAVE: WEb Applications Validation Environment.Sreeranga P. Rajan, Oksana Tkachuk, Mukul R. Prasad, Indradeep Ghosh, Nitin Goel, Tadahiro Uehara
2008APLASContext-Sensitive Relevancy Analysis for Efficient Symbolic Execution.Xin Li, Daryl Shannon, Indradeep Ghosh, Mizuhito Ogawa, Sreeranga P. Rajan, Sarfraz Khurshid
2004VLSIDHigh Level Design Validation: Current Practices and Future Directions.Indradeep Ghosh, Rajarshi Mukherjee, Mukul R. Prasad, Masahiro Fujita
2003ASPDACEvent-driven observability enhanced coverage analysis of C programs for functional validation.Farzan Fallah, Indradeep Ghosh, Masahiro Fujita
2003ICCDPrecomputation-based Guarding for Dynamic and Leakage Power Reduction.Afshin Abdollahi, Massoud Pedram, Farzan Fallah, Indradeep Ghosh
2003ITCEfficient Sequential ATPG for Functional RTL Circuits.Liang Zhang, Indradeep Ghosh, Michael S. Hsiao
2002VLSIDDesign for Verification at the Register Transfer Level.Indradeep Ghosh, Krishna Sekar, Vamsi Boppana
2000DACAutomatic test pattern generation for functional RTL circuits using assignment decision diagrams.Indradeep Ghosh, Masahiro Fujita
2000ICCDA Technique for Identifying RTL and Gate-Level Correspondences.Srivaths Ravi, Niraj K. Jha, Indradeep Ghosh, Vamsi Boppana
2000VLSIDHierarchical Error Diagnosis Targeting RTL Circuits.Vamsi Boppana, Indradeep Ghosh, Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita
1998DACA Fast and Low Cost Testing Technique for Core-Based System-on-Chip.Indradeep Ghosh, Sujit Dey, Niraj K. Jha
1998DACA BIST Scheme for RTL Controller-Data Paths Based on Symbolic Testability Analysis.Indradeep Ghosh, Niraj K. Jha, Sudipta Bhawmik
1998VLSIDController Resynthesis for Testability Enhancement of RTL Controller/Data path Circuits.Srivaths Ravi, Indradeep Ghosh, Rabindra K. Roy, Sujit Dey
1997DACHierarchical Test Generation and Design for Testability of ASPPs and ASIPs.Indradeep Ghosh, Anand Raghunathan, Niraj K. Jha
1997ITCA Low-Overhead Design for Testability and Test Generation Technique for Core-Based Systems.Indradeep Ghosh, Niraj K. Jha, Sujit Dey
1997VLSIDA Practical Method for Selecting Partial Scan Flip-flops for Large Circuits.Sudipta Bhawmik, Indradeep Ghosh
1996ICCADA design for testability technique for RTL circuits using control/data flow extraction.Indradeep Ghosh, Anand Raghunathan, Niraj K. Jha
1995ICCDDesign for hierarchical testability of RTL circuits obtained by behavioral synthesis.Indradeep Ghosh, Anand Raghunathan, Niraj K. Jha
1994VLSIDDesign of an Application Specific VLSI Chip for Image Rotation.Indradeep Ghosh, Bandana Majumdar